Statistical Design-for-Manufacturing (DFM) for integrated circuits

A statistical methodology for Design for Manufacturing (DFM) for integrated circuit process and devices is discussed in this dissertation. The device parametric variations due to the naturally occurring process variations of the manufacturing line may result in circuit performance degradation or low yield of the product. As the size of devices is reduced into submicron range, inherent small perturbations play an important role in the yield of the product. Therefore, the accurate estimation of MEAN and VARIANCE of device parameters in terms of process variations is very important for integrated circuit design and the prediction of the product yield. In this work, statistical methodology for estimating MEAN and VARIANCE of device parameters of interest using Computer aided design (CAD) tools has been presented. To facilitate the methodology, a software system called STADIUM (Statistical TCAD Analysis for Design for Manufacturing) has been developed. This system integrates statistical design and analysis with process, device, and circuit simulation programs. The strategies of design of experiments and new variable screening techniques using factor analysis and factor contribution have been introduced for efficient engineering. The application of this methodology on NPN bipolar device and NMOS device are also demonstrated in this work.