A low-power algorithm specific DSP for short-time signal analysis

Digital signal processing (DSP) has undergone a remarkable increase in interest and attention in recent years. Adaptive signal processing, which is a mainly time varying DSP, is a very important part of DSP. The fundamental problem associated with adaptive signal processing is short-time signal analysis and its major challenge is efficiency versus accuracy. Most of the research and development efforts in the area of circuit and system VLSI designs have been oriented towards high speed operation and with minimum area. This picture is, however, undergoing some radical changes mainly because of the remarkable success and growth of the portable consumer electronics market. Although speed and area are still the metrics by which we can measure implementation quality, a major creative challenge facing today's circuit and system CMOS VLSI designers is to design new generation products which consume minimum power. Lowering the supply voltage is the most effective way to achieve low power performance. One of the promising low-voltage circuit techniques is multithreshold-voltage CMOS (MTCMOS) technology. However, it is still in the simulation or test-chip-fabrication stages and has not yet been used in designing a system-like VLSI, such as a DSP or a microprocessor, and its effectiveness has not yet been established. In this project, the recursive procedure for real-time applications is developed using the half-sine wave window. The CMOS VLSI technology is used to design an algorithm-specific DSP for the short-time signal analysis. The 3.3 V supply voltage, which is the new industry standard for IC operating voltage, is used for the CMOS VLSI design. The supply voltage is further reduced to 1.5 V using a MTCMOS technology. The DSP design includes logic design, CMOS VLSI circuit implementation, and circuit simulation. The low power process and device are also studied theoretically. This work shows that the computational speed can be increased 50% without losing processing accuracy in a short time signal analysis and that 1.5 V MTCMOS technology can reduce the DSP power consumption 80% compared with 3.3 V CMOS technology while maintaining high speed and without increasing too much layout area.