Advanced gate stack materials and processes for sub-100 nm CMOS applications

Continued CMOS technology scaling beyond the sub-100 nm node encounters serious challenges posed by the intrinsic limits of the materials used in silicon CMOS. This dissertation investigates the solutions to the critical issues of the gate stack by introducing new gate stack materials, i.e., using high-permittivity (high-k) gate dielectrics to replace SiO ₂, and metal or poly-SiGe gates to replace the poly-Si gate.; A number of high-k gate dielectrics are studied. Silicon nitride, formed by jet-vapor deposition (JVD) or rapid-thermal CVD (RTCVD), and sputter-deposited HfO₂ are so far the promising candidates. Silicon nitride is thermally more stable, while HfO₂ offers lower gate leakage for a given equivalent oxide thickness (EOT) and consequently better scalability. It is also shown that the HfO₂ gate dielectric with a nitrided interface has sufficient hot electron reliability.; A gate material with a reduced or negligible depletion effect is needed to improve device performance. The poly-SiGe gate is for the first time demonstrated to be stable with a HfO₂ gate dielectric. Reduced gate depletion is achieved by better dopant activation in the poly-SiGe gate. In addition, the poly-SiGe gate results in thinner EOT than a poly-Si gate by suppressing the interfacial layer growth during high temperature annealing. These benefits combined with the CMOS compatibility make the poly-SiGe gate a very attractive near term alternative to the poly-Si gate.; A metal gate eliminates the gate depletion and boron penetration problems of the poly-Si gate. A key challenge is to identify CMOS compatible metals with appropriate work-functions. A Mo gate is studied with several alternative gate dielectrics, and is demonstrated to be a promising gate material for p-MOSFETs. In addition, the work-function of Mo can be adjusted to meet the requirements for n-MOSFETs by nitrogen implantation, making it possible to achieve dual gate work-functions using a single metal gate. CMOS processes based on dual-metal gates (Mo and Ti) or single metal gate (employing a Mo gate with nitrogen implantation to the gate of the n-FETs) are demonstrated. The use of metal gates requires substantial changes to the existing CMOS technology, so it is more likely a long-term solution to the gate electrode problem.