| As integrated circuit technologies scale down, process variations become increasingly critical and lead to large variances in important transistor parameters. As a result, circuit performance varies significantly, and some circuits may even fail. The large process uncertainties have caused significant performance yield loss. In addition, reliability issues such as ageing effects and environmental condition variations, further contribute to yield reduction and make it more challenging to create a reliable, robust analog circuit design.;In this work, a new approach to design cost-effective self-calibrated analog circuits is proposed. The key idea is to build multiple states for compensating the extreme variations. Particularly, each state is able to tolerate a specified range of variations. Therefore, at run time, the states can be adaptively selected to compensate the in situ variations. In the circuit implementation, a set of design parameters are selected and their values for each state are determined at the design phase. The pre-computed results can be stored on chip and applied to on-line calibration.;The new method has several key benefits. Firstly, it is a general design method that can be used for a wide range of analog circuits. Secondly, it is able to achieve better trade-offs among performance, yield, and cost by using multiple states. Thirdly, the new method introduces low design complexity. The optimal state can be selected according to the variations, and this would be possible to eliminate the needs for performance measurement, which is usually difficult to design and invasive to the circuit. Furthermore, the new method is able to achieve high efficiency in calibration using pre-determined results stored on chip, and it is able to compensate the process and temperature variations simultaneously.;An associated surrogate model-based macromodeling and design flow is developed. Surrogate models are able to provide approximations of more expensive circuit simulations. Once the surrogate models are built, they can be used to explore the design space. Since the models are extremely fast to execute, the model-based design is simple and computational inexpensive compared to the design using the actual circuit simulations. Moreover, the models can be reused for different design objectives and constraints. Therefore, surrogate-based methods are able to improve the overall design flexibility and efficiency.;The proposed method for self-calibrated design is demonstrated on a low noise amplifier (LNA) design and a phase locked loop (PLL) design. The results show that the proposed method is remarkably effective to compensate the large temperature and process variations. In the presented cases, the performance yields are greatly improved and better trade-offs between cost and yields are derived.;In addition, a new surrogate-based method is proposed to generate accurate and scalable macromodels for Input/Output (IO) buffer circuits. The macromodels have shown good accuracy in capturing the effects of reflections and variations, and their scalability makes flexible signal integrity analysis possible. |
