Research On Error Detection And Correction Of LDPC For SSD

ECC is one of the key technologies to ensure the data reliability of SSD.Bit error rate of flash memory in SSD increases gradually and noises in SSD are also increasing with the improvement of manufacturing.If the error correction performance of LDPC(Low density parity check code)as ECC in SSD can not be fully used,it will affect the performance of SSD and energy consumption.First,the existing threshold voltage sensing algorithms of flash memory cell for LDPC decoding do not use the minimum number of voltage sensing,which affects the performance of SSD.On the other hand,the existing researches of LDPC as ECC in SSD do not consider the error characteristics of flash memory.Then,the error correction performance of LDPC can not be fully used and the performance of SSD can be affected.We perform this research from three aspects,the optimization of flash memory cell threshold voltage sensing,the combination of error detection and error correction,the reduction of error correction redundant,as follows.In order to reduce the number of threshold voltage sensing,NSOR(Nonuniform sensing in overlapping region)algorithm is proposed based on the entropy in the overlapped regions of adjacent threshold voltage functions.LDPC decoding in SSD needs accurate threshold voltage sensing of cells.The existing threshold voltage sensing algorithms do not consider the difference of entropy in the overlapped regions.We find that the shape of entropy values in the overlapped regions is a saddle shape that is low in the middle and high in the two ends.We propose that threshold voltage sensing of cells apply different granularity according to entropy values in the overlapped regions.Experiment results show that the voltage sensing number of NSOR is reduced by 20% compared with Non-Uniform without sacrificing the error correction performance of LDPC.At the same time,the read performance of SSD using NSOR is also improved.The reading energy consumption using NSOR can also be declined compared with Non-Uniform.In order to improve the read performance of SSD,CDF-LDPC algorithm is proposed based on the error characteristic in SSD,which is a way of combining error detection code and error correction code.In the early lifetime of SSD,CDF-LDPC performs CRC decoding to find these error-free pages and identifies them before reading data from SSD.These errorfree pages can be directly read,and the pages with errors must be decoded by LDPC to correct errors.During the idle time of SSD,the error state of pages can be detected by CRC in advance.In order to avoid generating errors before reading data,only the pages in the fully-programmed blocks are detected by CRC in advance.Moreover,the speed of detecting pages can be accelerated by taking advantage of SSD parallelism.In the later lifetime of SSD,CDF-LDPC will be replaced with LDPC and the threshold range is given.Experiment results show that the read performance of SSD can be improved by more than 40% using CDF-LDPC for the read-dominated traces compared with LDPC.In order to solve the problem of error correction redundancy generated by a single LDPC code rate,self-adaption S-LDPC(Switch LDPC)algorithm is proposed based on multiple LDPC code rates.Usually,SSD must adopt the most powerful LDPC to meet the reliability requirement in the worst case.In the early lifetime of SSD,SSD has few error occurring.The error correction performance of LDPC is under-utilized,which is called ECC redundancy.We propose that SSD adopts multiple LDPC with different code rate in different stages of SSD to reduce ECC redundancy.Experiment results show that S-LDPC can reduce ECC redundancy compared to a single LDPC code rate.S-LDPC can also improve the read performance of SSD and reduce the decoding energy consumption.The paper proposes a new algorithm to get parallel lines in Euclidean geometry.The parity check matrices of different LDPC codes can be constructed by using parallel lines.