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The Distributed Digtal Control System Design And Simulation Based On The System-on-chip

Posted on:2015-10-20Degree:DoctorType:Dissertation
Country:ChinaCandidate:T F LiFull Text:PDF
GTID:1228330452954357Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
Most of the distributed digital control system(DDCS) usually connect all chips byPCB.Although every chip itself has low power consumption and high running speed,some factors derived from PCB have an important impact on the total system,forexample,the delay timing for internal connecting,the total power consumption,thenoise and space greatly decreased system performance and become the mainbottle-neck in electronics system design.However, with the developments of verylarge scale integrated(VLSI) circuit,System-on-Chip(SoC) technology is introduced intime, which integrates the overall computer system into one chip with the completefunction.The advantages are that it can lower power consumption,saveenergy,overcome noise, cut down space, improve the SoC system performance.TheSoC technology has been developed as an important industry in the field ofelectronics and information technology in the world because it is closely related withone country’s information security.The SoC technology has high research and marketvalue,and it is widely popular in the world.The workaround and development direction of SoC technology are firstlyintroduced in this paper, and then the current status and direction of the DDCS is alsointroduced, The overall DDCS is integrated to one chip from PCB board level by theSoC technology.In the meantime, The design and sub-module function of the on-chipDDCS are given in this paper. The theory and engineering implementation of theon-chip DDCS are descripted in this paper. Finally, There are many improvement onthe sub-modules of old PCB level DDCS. The strength and improvement are asfollows:1. The architecture design of on-chip DDCS is shown in this paper, whichintegrates all previous8-bit PCB level DDCS into one chip by the SoC technology,this merges complete function components, improves power consumption and cutsdown the space. In a summary, this makes the electronics system develop toward the integrated direction.2. The parallel computing with two ARM processors are put forward in this paper,which can improve the working efficiency of processors to the biggest degree.As aresult, it greatly improves the performance of the on-chip DDCS.3. A new theory that cuts down the system power is proposed, whose mainlycontrol the whole system power by the sleep and wake-up concept. Both sleep modescan effectively make the idle processors enter the sleep to lower power consumptionand save energy.4. A dynamic voltage and frequency scaling algorithm is shown in this paper,which mainly generates the different voltages and clock frequencies for ARMprocessors according to the actual ARM working load. It finally cut down the chippower and save energy.5. A32bits Coordinate rotation digital Computer(CORDIC) is put up with in thispaper,which includes circular vector mode, circular rotation mode, linear vector, linearrotation, hyperbolic vector and hyperbolic rotation mode.It is also the best completeCORDIC in the signal processing field.Besides,it has the higher calucalution precision.than the conventional CORDIC.6. A new firmware rule is shown in this paper.,which is called as one kind ofaddress exchanging rule in this paper, This working rule can avoid to restart system inthe urgent case that the firmware is failed to initialize the on-chip system.7.The research is focused on test vector generation,where the traditional adaptivegenetic algorithm is re-designed. This improves the quality of test vectors andsimulation verification efficiency.
Keywords/Search Tags:On-chip system, Parallel computing, Sleep, Dynamic voltage andfrequency scaling, CORDIC
PDF Full Text Request
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