Research On Design And Implementation Of CMOS Readout Circuits For Uncooled IRFPA

Compared with cooled infrared imaging systems, uncooled infrared imaging system can work at room temperature and greatly reduces the system size, cost and power consumption because of eliminating the heavy and expensive cooling equipment.In addition, it also provides a wider spectral response and longer life time. Foreign infrared imging systems institutions have already developed a large number of lower cost, higher reliability, high sensitivity uncooled infrared imager for military users. However, uncooled infrared imaging research and development started late and also constrained by industrial foundation in China, the technology is far behind of foreign countries. But the market demand is increasing, so the development of uncooled infrared imaging technology has become essential. Based on the above background, research on design and implementation of CMOS focal plane readout circuit (ROIC), which is the core device of uncooled infrared imaging system, had been proceeded in this paper.After a thorough understanding of domestic and foreign latest research work, the author proceeded the state 973 XXX project (ID: 51313XXX) as the main researcher. In the project, a monolithic 320×240 uncooled pyroelectric infrared focal plane array (IRFPA) readout circuit was independent designed and verified. Especially, in order to solve thermal budget dilemma encountered in the case of backend processing temperature of monolithic integration, the high-temperature resisted process of ROIC had been designed and implemented independently. Then as the main researcher, the author designed and developed the other two ROICs which have broad market prospects as pyroelectric ROIC, that is uncooled microbolometer 160×120 IRFPA ROIC and uncooled shortwave 320×256 multi-function snapshot IRFPA ROIC.In the above research, different detector types mean different ROIC structures, so after full consideration of schematic, layout, process and interface to detector, the main contribution and innovation are as follows:First, in the research work on ferroelectric-based uncooled infrared ROIC, a refractory metal and silicide connection structure compatible with standard CMOS process was proposed. By the large array of 320×240 readout circuit design, silicon verification and test, a good high temperature properties of low resistance interconnect structure was obtained, and with this new interconnect process utilized in standard CMOS procedures, thermal budget dilemma encountered in the case of backend processing temperature of monolithic integration can be addressed. This method has not been reported at home and abroad, Chinese patent had been applied and authorized, Patent No.: 200610021450.4.Second, for pyroelectric detector is a high impedance capacitive component, a Resistive Trans-impedance Amplifier (RTIA) readout circuit for Uncooled Focal Plane Array (UFPA) using active resistor was proposed in this paper. By using a sub-threshold MOSFET as a 1011? and above feedback resistor, a high gain current amplifier can be realized by common source structure which consisted of two transistors. The simple three transistors can be easily integrated under pixel and it has good impedance matching with pyroelectric infrared detector. Compared with traditional RTIAs which use special high-resistance materials as feedback resistor, the novel RTIA is low cost because no additional materials and processes are needed.Third, based on RTIA described before, a RTIA for UFPA using native MOS was proposed. Because no additional mask in native MOS process, and compared to the enhanced MOS working in the subthreshold region, native MOS gate was directly connected to ground, therefore, the large resistance was stable and bias circuit was eliminated.Fourth, during the research and development of shortwave 320×256 IRFPA ROIC, snapshot mode was used, and it required that all array elements integrated simultaneously, then all integration signals stored in the unit and read out. Although this mode can freely adjust integration time, enhance the signal to meet the high-resolution, high sensitivity, high-speed infrared detection needs; but in chip design, the integration amplifier and sample and hold circuit will be contained in a limited area of each pixel. It means great difficult will meet in the chip design. And the ROIC was designed and verified in the absence of reference documents and design details. By using Cascode CTIA to replace traditional two stage operational amplifier CTIA, the integration amplifier, buffer, anti-blooming, sample and hold were contained in the 30×30μm2 pixel area and snapshot mode was realized. Through adjustable integration time and capacitors, the dynamic range can be extended efficiently. Based on the Gray code theory, random window access, dynamic image transposition, and 1, 2, 4 selectable channel outputs, can be realized by digital control circuits of the ROIC.