The Read-out Integrated Circuit Design For 320×240 Uncooled Infrared Focal Plane Array

Since the late seventies and the early eighties of last century, uncooled infrared focal plane detector technology has developed to the level of the third generation, compared with the cooled, it has been developed significantly in both civilian and military aspects, because of its light weight, small size, long life, low cost, low power, fast start and good stability. The original uncooled infrared focal plane arrays and some other types of bolometer has involve to silicon-oxide- insulator (SOI) diode uncooled IRFPA detectors, the array size developed from the original 160×120 small-scale type to the large-scale 1024×1024 type, and with the expansion of the array, read out integrated circuit (Read Out Integrated Circuit referred as ROIC) design has become increasingly complex.A simple description of the infrared focal plane will be introduced about the principle of infrared focal plane arrays, classification, applications and the development at home and abroad so that the reader can understand easily. Then start for the size of 320×240 infrared focal plane array circuit design, The circuit design includes three parts, analog circuit design, scanning, and interface circuit design, digital timing control circuit design, the focus this paper is on the design of analog circuit, which the bottlenecks consistent constraints the readout circuit design. This paper designed the suitable integrating amplifier to address these issues with the voltage signal amplification, and studied the relationship among the array size, frame rate and circuit parameters carefully,which can provide theoretical guidance for the larger scale read out circuit designing. In timing control circuit of the digital part, the original program D-flip-flop has been replaced by a dynamic shift register, greatly reducing the power and area of the digital timing control circuit, which is a very good reference in large scale array readout circuit design.This paper uses cadence software for the schematic design of analog circuits, scanning, and interface circuits, digital timing control circuit, complete the layout of the schematic, layout verification and post-simulation. Last we tape out, package testing,and validate of the design.