Study On The Key Techniques For Low-light-level CMOS Image Sensor

Low-light-level image technique has important implications in many areas, such as military, medical and science exploration. The existing technique of low-light-low imaging has some disadvantages, such as high cost, complicated technology and hardness in designing and manufacturing. So, CMOS image sensor has been adopted to develop a low-light-level image sensor in this paper. The CMOS image sensor has some advantages, such as full-fledged technology and low cost, and also it is easy to integrate image processing circuit. But, the present techniques of CIS don't fit imaging in low-light-level condition very well. So, a study has been done to solve the key problems for imaging in low light level.First, the pixel and readout circuit have been studied to solve the low pixel output SNR and readout circuit output SNR in low-light-level condition among the existing CIS systems. A theoretical model has been put forward by analyzing the noise sources in pixel. The analysis results of the theoretical model show that increasing pixel area and integration time properly are the best choices when the pixel structure doesn't change. This work also presents a two-parallel CDS circuit and a high gain PGA circuit. Both of them can improve SNR.Second, a 14-bit 3MS/s pipeline ADC has been presented for a 512×512 pixel array low-light-level CIS system which can image under 10-4lux light intensity. A fully differential 1.5bit/stage structure pipeline ADC is adopted to simplify the analog design and remove the even-order term errors. This work also adopts high DC gain folded-cascoded amplifiers with gain boost structure, accuracy comparators, second-order bandgap reference and capacitor array DACs to make sure the high precision of ADC in analog design domain. The correctness of the ADC design has been verified by theoretical analysis and simulation.Third, a foreground calibration algorithmic for pipeline ADC applied in CIS system has been presented, because the signal processing in CIS system can be discontinuous between frames or rows. The algorithmic calibrates the pipeline ADC during the gaps between frames or rows in CIS system. It extracts the calibration parameters by estimating the deviations of the endpoints on the transmission curve, and calibrates the errors in pipeline ADC, such as gain error, reference voltage offset and so on. The algorithmic has been fully verified. To fit the presented algorithmic, a calibration mode has been added into the pipeline ADC. The calibration mode is controlled by the CIS. And it tests the deviations of transmission curve endpoints of under testing stage from back stage to front. The improved pipeline ADC completely fit the operation of presented calibration algorithmic.The key techniques for low-light-level CIS have been studied, designed and simulated in this paper, which includes pixel and readout circuit design, high precision pipeline ADC. The results show that the CIS system can totally fit the low-light-level image application.