Research On Physical Mechanism And Circuit Design Of Low Light Level Pixel Sensor

With the improvement of the semiconductor process,making it possible to fabricate the back-illuminated CMOS image sensor.Compared with the traditional CMOS image sensor,the back-illuminated structure greatly improves the photoelectric conversion efficiency of the CMOS image sensor.Back-illuminated CMOS has gradually replaced CCD image sensor in many areas thanks to its low cost,low power,integrability,compatible with the process of standard CMOS.However,the traditional back-illuminated CMOS image sensor has problems of high noise,low multiplication,large dark current and image tailing,which greatly limits the application of back-illuminated CMOS image sensor in low light conditions.Aiming at these problem,this paper introduces the pinned avalanche photodiode?PAPD?on the basis of the traditional back-illuminated CMOS image sensor.Then improves the performance of back-illuminated CMOS image sensor by optimizing the device structure and parameters in the low light conditions.Finally designs a correlated double sampling circuit to decrease the fixed pattern noise of pixel in low light condition.In this paper,the impact ionization in PAPD is studied and establish a physical model of electric field and avalanche gain,which lays the theoretical foundation for the optimization of PAPD structure.Then,the PAPD structure is simulated based on t he three-dimensional numerical simulation platform Sentaurus TCAD.The influence of p+layer on the surface recombination current is analyzed,optimized and the concentration of the substrate,which reduced the recombination current in the body of PAPD.In addition,research on the influence of changing the doping concentration of floating diffusion capacitance,the gate length and whether introduce of anti-Punch Through layer or not.The longer the gate length is,the lower leakage current become;APT layer can also effectively reduce the leakage current,but the APT layer will introduce a parasitic capacitance at the same time.In addition,the influence of substrate bias voltage and pinning voltage on the electron concentration in N well is studied.A model of pinning voltage based on doping concentration is established.When the substrate concentration and N well concentration are 1×10¹⁵cm^-3 and 2×10¹⁵cm^-3,the space charge density is equal to doping concentration,N well is completely depleted.Finally,in order to reduce the fixed pattern noise,the correlated double sampling circuit is designed and the circuit is optimized based on Cadence platform.The results show that the proposed circuit can effectively suppress the fixed pattern noise at high frequencies.Compared with the previous circuit,the noise level decreases from 259nV/?to 295pV/?.In summary,in order to improve the application of back-illuminated CMOS image sensor under low light conditions,this paper introduces a PAPD structure on the basis of the traditional back-illuminated CMOS image sensor,optimize its performance under low light condition.In order to suppress the fixed pattern noise,a correlated double sampling circuit is also designed.The results show that the optimized pixel sensor can effectively suppress the image lag and has a lower leakage current,a lower noise level.The results of this paper have some guiding significance for the design of low light CMOS image sensor.