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Anti-TID-Radiation Design Of Pixel-level ADC In CMOS Image Sensor

Posted on:2022-02-13Degree:MasterType:Thesis
Country:ChinaCandidate:M Y LiFull Text:PDF
GTID:2518306350983249Subject:Information and Communication Engineering
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The vigorous development of CMOS image sensors in aerospace applications such as remote sensing imaging and star sensors requires a certain degree of resistance to space radiation.and the pixel-level ADC used in its core pixels also puts forward the demand for irradiation reinforcement.It has important application value to study the anti-radiation design of CMOS image sensor ADC.In this paper,an S-Gate-Assisted Silicon-On-Insulator(SGA SOI)device is proposed,and an anti-radiation pixel-level ADC circuit for CMOS image sensor is designed.The main work and innovation of this paper are as follows:Firstly,a Multi-Channel Bit Serial(MCBS)ADC is designed and applied to 4-Tube Buried-Photo-Diode(4T-BPD)pixel cell.Every 4 pixel cell multiplexes an ADC,only the core circuit modules are integrated into the pixel unit,which makes the filling factor very high,can easily quantify the variable step size and eliminate the image lag.Secondly,the optimized design and simulation of the pixel-level ADC circuit are completed.After determining the design scheme for each circuit,the gain,power and noise of each module are optimized to improve the performance of the circuit,and a new coding control method is proposed for the ramp generator circuit which occupies a large chip area,which reduces the number of capacitors and saves the layout area.Finally,a novel SGA SOI n-MOSFET which can resist 5k Gy dose is proposed.Sentaurus TCAD software is used to build the 3D simulation model of SOI devices,and the influence and degree of TID effect on SOI devices are simulated and analyzed.Three kinds of irradiation-sensitive oxide layers of SOI n-MOSFET are strengthened with different schemes respectively,and Kink effect of the Partial Depletion(PD)SOI n-MOSFET is effectively eliminated by increasing the S-gate contact structure.According to the transfer characteristic curve and key sensitive parameters after irradiation,the anti-TID effect simulation of the whole circuit is completed by modifying the electrical parameters of n-MOSFET,and the layout design is completed at the same time.The anti-irradiation pixel-level ADC circuit designed in this paper is simulated with DB's 0.18?m technology,and is simulated and verified by Cadence Spectre software.The circuit uses 3.3V power supply,the sampling signal frequency is 200 kHz,the input signal frequency is 3.90625 kHz,the dynamic parameter index values are as follows:ENOB=7.91 bits,SNDR=51.22 dB,SFDR =65.99 dBc,SNR=53.58 dB,THD=-56.25 dB,the static parameter index values are as follows: DNL=+0.41/-0.52 LSB,INL=+0.87/-1.06 LSB.The power consumption of a single pixel module(4 pixels plus comp and latch pairs)is4.54?W,FOM?83.19 f J/conv,and it can completely resist the TID effect dose of 5k Gy.
Keywords/Search Tags:CMOS image sensor, 4T-BPD pixels, Pixel-level ADC, SOI n-MOSFET, TID irradiation reinforcement
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