| CMOS image sensors (IS) are applied widely in such fields as multimedia, industrial detection, digital imaging, satellite remote sensing, and medicine. With the improvement of multimedia application and CMOS process, CMOS image sensors is developed rapidly and possess the ability of integrating with A/D conversion, signal processing, control and interface circuits on chip for novel imaging function and high quality image as well as small bulk and low cost. Pixel-level CMOS digital image sensors provide depressed ADC speed on-chip, lower noise and power consumption, observation of continual pixel output and wider dynamic range in comparison with row-level and chip-level ADC. Therefore, it is a valuable work in application and theory to study Pixel-level CMOS digital image sensors. This dissertation introduces the advantages of CMOS IS, and then the pixel structure, operation principle and the review of development and application. The necessary and signification of studying IS are also discussed in this dissertation. The operation principle and static characteristic of photodiode, usually as the photon-electrical transmitter of IS, is deducted. The voltage decay of photodiode at the mode of integration is analyzed quantity. Since the fill factor is small, the sensitivity of pixel should be high, and dark current should be as little as possible. Based on the analysis of impact of structure of pixel on the dark current and spectral response, a novel type of photodiode structure of p+/n junction mixed with p/n junction with reset ring is presented. This photodiode has little dark current, high sensitivity and wide spectral response, which has been verified by testing chip. Conventional A/D converter has the shortcoming of complicated structure, high power consumption, large area, so it can't used in chip-level integration, which has rigid requires on chip area and power consumption. Multi-channel bit serial ADC uses successive comparisons to output a bit at a time simultaneously from all pixels, so high readout rate can be achieved. Other coding may be realized by programming the ADC. This ADC can be implemented by simple robust circuits, overcoming the disadvantages of traditional ADC, and suitable for on chip A/D design. The ADC is fully electrically testable without the need for any optics. ADCs in different pixel cell share diver signals, to reduce fixed pattern noise (FPN). A 4-pixel shared one 3-bit ADC testing chip, in which the cascode operation amplifier is also used as comparator, is designed and simulated by PSPICE. It turns out that multi-channel bit serial ADC is a feasible structure to be integrated chip-level. Based on the feasible multi-channel bit serial ADC method, one 128×128 digital image sensor is implemented, in which 4 pixels share a 8-bit A/D converter and one latch. Simulations by PSPICE about pixel cell circuit, comparator and latch, are done. Different from traditional analog image sensors, the resulting image data is read in parallel in bit plane. The noise in CMOS IS is mainly 1/f noise, KTC noise, fixed pattern noise, etc. The noise source and methods to restrain noise is considered. The noise can be reduced by proper structure and process. Also, the signal processing circuits is very useful in reducing noise. The imaging quality of CMOS image sensor isn't competitive with CCD because of noise. Nevertheless, with the development of noise-reducing technology, CMOS IS will image as good as CCD, and its prospect is wider. The BITX and RAMP signal-generating circuits used in 8-bit ADC has been designed and simulated by PSPICE software. A data sampling circuit based on traditional output signals of PPS and APS image sensors is designed and successfully testing. There are two creative and novel work has been done: 1. After analyzing the influence of photosensitive pixel structure to dark current and sensitivity, a new photodiode structure of n +/ p junction mixed with n -well/ p junction with reset ring is presented. The advantages of this structure are little dark current, high sensitivity, and wider spectral response. The dark current is minished through the way of diode's isolation with bird's peak region by n+ ring and reset ring, while the spectral response is improved by absorption of n+/p junction and n-well/p junction to short wavelength and long wavelength. This structure is easily implemented technology. A testing structure is designed and verified. Also this structure fits for other image sensors. 2. After analyzing pixel circuit carefully, a folded cascode operation amplifier as the comparator of multi-channel bit serial ADC is presented. The new amplifier possesses better performance; consequently the capability of ADC is improved. In order to obtain wider output swing, the amplifier, working in weak reversion region, is thoroughly considered. All the work is simulated by PSPICE software and the simulated results show such comparator improves the performance of ADC.
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