Research On The Methodology Of IC Design And Technology Of IP Design

The everyday development of IC industry and the continuous improving of IC design methodology are interdetermined. The research on IC design methodology is made in this dissertation. The up-to-date IC design methodology front field:Platform Based Design is studied and some new opinion and new method are proposed in chapter 2. "Establishing library principle " and the conception that "top-down design and bottom-up establishing library is two parallel design flow" is the important part of chapter 2. The concrete design technique is discussed about bottom-up establishing library in the follow-up two chapters. And IC IP (Intellectual Property) library (shortened form is IP library) is the study object. IP library consists of IP Core and IP Block. The design flow and methodology of IP Core is discussed and an 8-bit MCU is designed in chapter 3. The design flow and methodology of IP Block is discussed and a memory interface circuit (SGRAM Interface) is designed in chapter 4. The MCU and SGRAM Interface (STI) above have passed the ministry and province grade authentication. And STI is authenticated as software production. The author of this dissertation is the technique master of these two projects. This dissertation is supported by the following projects:National Foundation for ScienceResearch on the Theory of Sub-deep Micro and Super High Speed Multimedia Chip Design' (No.6987601 0)National Foundation for High Technology Research & Development 'Interface of VLSI IP core and Related Design Technology' (863-SOC-Y-3-1) A-National R&D Programs for Key Technologies For the 9th Five-Year Plan Research on High Level Language Description and Embedded Technology for MCU' (97-758-01-53-08)National Foundation for the Ministry of Education,PRC'Research on the Optimal Theory and Methodology of SOC Software/Hardware Integration Co-design and Co-verification' (MOE [2001] 215)National Foundation for Science and Technology Publication'Design of Interface Circuit for Computer with Verilog' [ ( 99) -F-l-011]A deep research on System level design methodology of 1C and the design technology of MCU-IP and interface IP are made in this dissertation. The main work and achievements are as follows:1 Building block principle and the building block component maximum principle are brought forward based on the research of developing history of IC design. After reviewing the development of building block from transistor,gate,IP to system platform,the possibility that next generation building block component would be Multi-SoC (MSoC) is brought forward.2 The design idea of based on library and mapping is proposed for the first time. In the traditional design flow,synthesis is the typical mapping process,it is the process that high level resultant seeking suitable library component in the lower level library. If we established IP library and platform library,in addition with existing gate level library,then the whole design flow is a continuous mapping process from top to bottom. The basic of this process is the existing of each level library.3 The conception and methodology on orthogonalization of separation between IP mapping and platform mapping in system level design is proposed for the first time. And a new platform based on design flow is brought forward according to this conception.4,The necessary of building IP library is discussed after researching the important history action of gate level library and layout library. At the same time,the conception of platform library is proposed and the necessary of building platform library is discussed.5 The conception that top-down system level design and bottom-up building library are parallel operations is proposed for the first time,and the conception of parallel design flow is brought forward according to this.6 IP design flow in the process of building IP library is researched in this dissertation. Design flow and methodology of IP Core -- 8 bit RISC micro-controller soft IP core (HGD08R01) and the demonstration of HGD08R01 soft IP core complying with V...