Design And Verification Of The Bus Interface Unit In X Microprocessor

From Intel 8086 to Pentium 4, the rate of processor enhanced rapidly. The clock frequency of Pentium 4 core is above 3GHz. But the access rate of off-chip memory and peripheral equipments hasn't been increased synchronous. Moreover the gap is enlarging.As only access that the processor commutes data to off_chip memory or peripheral equipments, bus interface unit affects the efficiency of memory system directly. So, it is a key problem to design a hign performance bus interface unit, and it is crucial meaning for hign performance microprocessor. The main content and production of this paper are showed as follows:1. Bus interface protocol of X microprocessor is defined according to design specification of X microprocessor;2. Base on the bus protocol a kind of high performance bus interface unit configuration is proposed and designed in particular;3. A p-bus protocol model is proposed and a complete system verification platform is developed;4. The bus interface unit in X microprocessor is verified in system level. The result indicates that the bus interface unit can meet X microprocessor's need.The research of system bus protocol and implementation of the system bus component of X processor are significantly important to improve the performance of our X processor, and this paper is also a preferable reference to explore system bus protocol of the next-generation high-performance processors.X microprocessor has been taped out succeedly, and it can completely satisfy the request of design. Finally, the result proves that the bus interface unit is correct.