Research On The LDMOS With Separate Composite Dielectric Trench

With the continuous development of integrated circuits,easy integration becoming an important trench in the development of semiconductor devices.The lateral power devices are basic devices for the power integrated circuits based on the simple fabrication process with surface electrodes and facilitated integration with other devices.In the design of lateral power devices,increasing the breakdown voltage（BV）often accompanies the increase of the specific-on resistance(R_on,sp),showing a trade-off trend.Therefore,achieving a balance between the BV and R_on,sp is the main issue for lateral power device designers.Trench technology and high-K dielectric technology have been widely studied by designers due to their special advantages.In this thesis,a novel separated composite dielectric trench lateral power device is proposed based on trench technology and high-K（HK）dielectric,which effectively reducing the R_on,sp of the device while ensuring its BV,improving the overall device performances.The main works including:（1）A novel LDMOS with separating composite dielectric trench（SCDT LDMOS）has been proposed.The main innovation of the device is the separating trench in the drift region,the composite dielectric the consisting of oxide and high-K dielectric material.The trench gate structure is also based on the high-K dielectric.The trench gate and the separate composite dielectric trench in the drift region sharing the same depth and high-K dielectric thickness.The process can be prepared by simultaneous etching of the gate and separation trench,and by simultaneous deposition of high-K gate dielectric and high-K dielectric in the separation trench,reducing the cost of the device.The separate composite dielectric trench in the drift region extends the current vertical conduction area and helps deplete the drift region through the assistance of high-K dielectric material,effectively enhancing the doping concentration of the drift region.Moreover,a MIS capacitor structure is formed by the metal gate,high-K gate dielectric,and semiconductor drift region,which increases the MIS capacitance due to the high-K dielectric material.The metal trench gate extends the electron accumulation layer in the vertical direction when the device is in the on-state,leading to the accumulation of a large number of electrons in the surface of the drift region,resulting in an increase in the electron accumulation density（EAD）,which provides a low-resistance current channel and effectively reduces the R_on,sp of the device.The simulation results show that the BV of the proposed device is comparable to that of conventional LDMOS,while the R_on,sp of 29.57 mΩ·cm² is reduced by 45.7%compared to the conventional LDMOS.Additionally,the figure of merit（FOM）is increased by 83.5%.（2）A process scheme for the fabrication of the proposed separated composite dielectric trench LDMOS device is designed.The Sentaurus simulation software is used to perform the process simulation of the new device,and the process parameters and conditions are investigated.The electrical performances of the SCDT LDMOS obtained from the process simulation are compared and analyzed with the results from the device simulation.The results show that the electrical characteristics obtained from the process simulation are in good agreement with those from the device simulation,which verifies the feasibility of the proposed process scheme and provides the guidance for the device fabrication.（3）The experiments of the key processes in SCDT LDMOS are carried out.The experiments includes photolithography,trench etching,high-K dielectric deposition,and other crucial steps.The photomask patterns are designed,the trench etching and high-K dielectric deposition processes are completed.The specific process parameters and excellent experimental results for trench etching and high-K dielectric deposition are obtained.These results further confirm the feasibility of the process scheme and provide effective guidance for device fabrication.