Design And Verification Of Domestic Analog-to-digital Converters Chip Testing System Based On FPGA Architecture

The import of chips,such as high-precision ADCs,has been significantly impacted by the alterations in international relations in recent years.Therefore,accelerating the localization of chips is an important measure to get out of this dilemma.With the country’s vigorous promotion of the development of the integrated circuit industry,major domestic research institutes and chip manufacturers have been committed to the research and development and design of ADC chips.However,due to the limitation of the technical level,major domestic research institutes and chip manufacturers still have certain deficiencies in the performance verification of ADC chips Therefore,designing a versatile and low-cost ADC chip test system is of great significance for the development of ADC chips.In this thesis,the basic principle of ADC chip performance test is studied,a maximum sampling rate of 3.2GSPS ADC chip test system is designed,including the design of multiple modules of the ADC chip test system,and debugging and verification of the ADC chip test system.The primary work accomplished is as follows:(1)Combined with the project requirements,a design scheme of multi-channel GSPS-level high-speed data acquisition card is proposed,and the design of ADC analog input circuit,clock generation and distribution,and power module is completed.(2)Proposing a design scheme for the hardware platform of the ADC chip test system,based on the requirements of ADC chip performance testing,the hardware platform adopts an architecture of FPGA and DSP combination,completes the design of the clock module and power module,and utilizes the FMC connector to realize the separation of the hardware platform and the ADC acquisition card,so that the ADC performance test system has versatility.(3)Complete the design of FPGA modules for ADC chip test systems.Analyze the functional requirements of the system,design SPI interface,JESD204 B interface driver,DDR3 data cache module,SRIO interface,and realize the functions of sampling data acquisition,processing,buffering and transmission of the ADC chip test system.(4)Completed the ADC chip test system software module design.The MATLAB GUI is used to design a visual graphical user interface to perform and display the results of the ADC sampled data.(5)After setting up the experimental environment and verifying the effectiveness of the ADC chip test system function,three typical ADC chips are selected to verify the versatility and reliability of the ADC chip test system.