| With the rapid development of modern communication technology,the bandwidth demand of communication signals has increased rapidly,the signal presentation form has become more and more diverse,and the signal processing has become more complex,so modern signal systems and devices are facing serious challenges.With the advent of the post-Moore era,the integrated circuit process is gradually approaching the physical limit,and the homogeneous single-core processor typical of CPU is bottlenecked,so the traditional CPU-based embedded signal system and equipment can no longer adapt to the analysis and processing needs of modern signals.In this context,the new embedded platform represented by "FPGA+ARM" heterogeneous has shown unprecedented performance advantages and development potential,which utilizes the parallel processing characteristics of FPGA to guarantee the system’s arithmetic requirements and ARM to provide high flexibility and high scalability for the system,combining the advantages of both architectures.The advantages of both architectures are fully combined to provide an excellent solution for "high precision acquisition and high speed data processing of broadband signals".Therefore,this paper designs a basic system architecture for high-speed signal processing and analysis based on the new heterogeneous embedded platform of FPGA+ARM,which realizes the collaboration of software and hardware cores and modules through SOPC(System On Programmable Chip),with dynamic configuration,real-time variable sampling structure,real-time variable point FFT unit,10 Gigabit Ethernet communication link,and signal analysis software.This architecture is designed to provide a basic template for modern signal acquisition,processing,and analysis needs.This paper focuses on the collaboration between soft and hard cores and theIn this paper,we focus on soft-and hard-core collaboration and dynamic configuration architecture,and our main work is as follows:(1)Based on AD9627,the design and overall construction of the basic modules of dual-channel independent sampling structure and dual-channel time-alternating sampling structure are completed,and an improved correction method is proposed for inter-channel mismatch errors by replacing the ideal Hilbert transform with a derivative filter.A dynamic configuration architecture is designed through the system master control,and finally the dynamic switching of the two sampling structures and the real-time configuration of the AD9627 are realized.(2)A fixed-point full-precision dual-channel variable conversion point FFT module with a maximum conversion time of ≤36.153 us is built using the Radix-4 architecture with the Xilinx FFT IP core,and an Ethernet communication link with 10 G bandwidth is designed based on the GTX high-speed transceiver,and the MAC protocol layer is built by the 10 G MAC Subsystem.A UDP communication protocol stack for 10 G bandwidth is designed,and finally UDP communication with 10 Gigabit bandwidth is realized.(3)Design a soft and hard core communication scheme based on AXI4 protocol to realize the data interaction and interconnection between FPGA and ARM,transferring the floating point numbers in FPGA computing to ARM processing through AXI,and accelerating ARM processing by FPGA hardware to realize soft and hard cooperation.The system master control module is designed on the hard core side,and the master control is connected to each hardware unit,which can be dynamically reallocated according to different application requirements,providing a hardware basis for high flexibility and high scalability of the overall system.(4)This thesis designs a back-end signal analysis and processing software based on Matlab,with a hardware downlink configuration interface and an uplink data capture and analysis interface,which can realize the time-frequency domain waveform depiction of signals,and can also analyze and display the SFDR,SNDR,ENOB and other indicators of signals,and has an interface layout that adapts to the underlying architecture switching,so that the system has very good The system is very versatile and easy to use.Finally,the performance and stability of the system architecture are tested and verified,and the results of the signal sampling and processing analysis under different configurations are shown with the Matlab interface to verify the feasibility of the SOPC-based soft and hard co-designed system architecture. |
