Design And Implementation Of Key Circuit Of High-density Spin Transfer Torque MRAM

The area constraints of movable devices in high-speed communications have created great application demands for high-performance,high-density memory.Spin-Transfer-Torque Magnetoresistive Random Access Memory(STT-MRAM)has broad application prospects.However,there are problems in the reliability of read-write circuits in high density STTMRAM.The read-write design schemes are proposed in this work to improve the reliability and yield of circuits in high-density STT-MRAM.Firstly,a high sensing-margin sensing amplifier(HS-SA)is proposed,which accelerates the amplification of the bit line voltage difference and keeps it at the peak point through a cross-coupling positive feedback structure.It expands the sensing window to improve the sensing margin and read yield.Secondly,this work proposes a pulse-detect-write-termination,which combines the characteristics of real-time monitoring and periodic monitoring.It uses short-pulse monitoring signals without interrupting the write operation,which has a small cost of power consumption and area.This scheme monitors and shuts down the write path in time after write operation is completed,which significantly reduces power consumption during the write period.Finally,an negative-voltage write assist circuit is proposed.Combined with the write operation monitoring signal,it injects the charge into the bit line to generate a negative pressure pulse after detecting the write failure,which increases the write voltage and write yield.Using HLMC 28 nm CMOS and MTJ 70 nm hybrid process,the HS-SA with a compact structure improves the read yield by 21% compared to traditional read circuits.The sensing margin is increased by 50% and the read power consumption is reduced by 38% at 70%tunnel magneto-resistance(TMR),under 0.7V supply voltage.Compared with traditional sensing amplifier,the sensing window is 8.2 times larger,which improves the robustness of the circuit.The pulse-detect-write-termination reduces write power consumption by more than80% within a 20 ns write cycle.The write assist circuit improves write yield by 40% with the wide voltage(0.9V～1.2V)and different write periods(1ns～9ns),which effectively reduces the probability of write failure and improves the reliability of high-density STT-MRAM write circuits.