| With the wide application of high-speed data acquisition technology in radar communication,medical imaging,artificial intelligence and other fields,data acquisition systems need to measure increasingly high-speed and complex electronic signals in a fine-grained manner.For some applications where the single-chip analog-to-digital converter(ADC)cannot meet the high sampling rate requirements of data acquisition systems,researchers have proposed a time-interleaved(TI)ADC sampling structure using parallel sampling of multiple low-speed ADCs.Using the TIADC architecture can significantly increase the sampling rate of a data acquisition system while maintaining the original sampling accuracy.However,in practical applications,channel mismatch errors will be introduced in TIADC system due to sampling time deviation and performance differences among multiple ADCs,which will significantly reduce system performance.In view of the above background,this paper carried out the following research:Firstly,based on the in-depth study of the basic principle of TIADC,the generation mechanism of channel mismatch error is systematically discussed and the error equivalent model is established.The influence of three channel mismatch errors on the sampling performance of TIADC system is analyzed from the mathematical point of view,which provides a theoretical basis for the study of channel mismatch error calibration algorithm.Secondly,this paper studies a channel mismatch error calibration algorithm based on model identification.The error model of the system is improved,and the influence of the channel mismatch error on the TIADC system is attributed to the influence of the equivalent model transfer function of the system.Through the parameter identification of the transfer function of the equivalent model,the transfer function expression that can characterize the transmission characteristics of each channel of the system is estimated,and then the input signal is reconstructed according to the transfer function and measurement data of each channel to complete the calibration of the channel mismatch error of the TIADC system.Then,the hardware platform of TIADC data acquisition system is built by using four16 bit,125Msps ADC chips.Based on the modular design idea,the key circuits of the hardware platform including analog signal front-end,multiphase clock and power distribution circuit are designed.At the same time,the hardware system is used to test and verify the effectiveness of the error calibration algorithm proposed in this paper and the performance that the system can achieve.Finally,the results of algorithm simulation and hardware test show that the model identification algorithm studied in this paper can accurately describe the input and output characteristics of each channel of the system,and the dynamic performance of the system has been significantly improved after calibration. |