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Design And Implementation Of PCIe-Based Communication Protocol Stack Hardware Acceleration Scheme

Posted on:2023-11-18Degree:MasterType:Thesis
Country:ChinaCandidate:Y Q WangFull Text:PDF
GTID:2568306914957419Subject:Electronic and communication engineering
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With the development of Fifth Generation Mobile Communication Technology(5G),the rapid increase of massive data has more urgent requirements for data transmission and data processing in communication systems.In the terrestrial satellite communication system,the data received by the antenna will be accelerated at the physical layer in the Field Programmable Gate Array(FPGA)and then entered into the server or general-purpose computer to complete the subsequent upper-layer operations,which involve data exchange between software and FPGA.Peripheral Component Interconnect expresses(PCIe)serial bus has high transmission bandwidth,point-to-point interconnection and good versatility,and is widely used in high-speed data transmission links in this scenario.This paper studies and analyzes PCIe bus,FPGA and OAI(OpenAirInterface)simulation platform and proposes a PCIe-based communication protocol stack hardware acceleration scheme,using PCIe bus to build a high-speed data transmission link between software protocol stack OAI and hardware FPGA and transfer some data processing functions of the physical layer in OAI to FPGA to realize hardware acceleration.First,the PCIe high-speed data transmission link was built,and the XDMA IP core provided by Xilinx was used to build the data transmission channel,including the design of the hardware logic circuit and the host computer control program.Then,this paper used the software and hardware joint debugging to capture the data and control signals in the link to verify the feasibility of the link.Secondly,the PCIe link is designed as a public interface integrated into the OAI.This interface can be called in the platform and transmit data to the FPGA.This paper uses it to transfer the OAI physical layer data scrambling module to the FPGA for implementation.Finally,this paper builds a communication protocol stack hardware acceleration platform in the video image transmission scenario and transfers the data stream collected by the camera as user data to the protocol stack hardware acceleration platform.In the case of a large signalto-noise ratio,the video data sent by the physical layer downlink transmitter can be successfully received and restored by the receiver.
Keywords/Search Tags:PCIe, FPGA, communication protocol stack, image transmission, hardware acceleration
PDF Full Text Request
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