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Design Of Hardware Acceleration Platform For Image Processing Based On PCIe Interface

Posted on:2022-12-16Degree:MasterType:Thesis
Country:ChinaCandidate:C HeFull Text:PDF
GTID:2558307052453744Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
Image processing technology has been widely used in today’s society.With the development of artificial intelligence,blockchain,cloud computing,big data and other information technologies,more and more scenarios put forward high requirements for the speed of image processing.The PCIe interface has the characteristics of high speed,high bandwidth and low delay.Combined with the excellent parallel computing ability of FPGA,the image processing hardware acceleration framework based on the PCIe interface becomes a potential solution,which has important research value and practical engineering significance.A DMA data transmission framework based on the PCIe interface,which is specially optimized for data stream transmission,is designed for the image processing hardware acceleration scenario in this paper.In view of the low correlation between software implementation and hardware parallel implementation of image processing algorithm,an image processing hardware acceleration architecture based on the PCIe interface is designed,which adopts an unified image input and output interface and could greatly improves the code maintainability and performance comparability.The Adaboost face detection algorithm is selected for research,and a logic level parallel acceleration architecture based on array unit is implementated.After that,the architecture is improved,and a hardware acceleration system of face detection based on the PCIe interface is built.SWORD4.0 Kintex-7 FPGA acceleration platform and server host are used to verify the hardware acceleration system of face detection based on PCIe interface.The results are compared with the Open CV software based face detection implementation scheme,the speedup ratio is between 4.2 to4.7;and compared with the the industrial Face Pass terminal of Reconova,the detection speed is increased by 2.7 to 3 times;compared with the face detection acceleration system implemented on Xilinx KCU105 FPGA platform in reference [48],the detection speed is improved by 66% to 80%.The detection speed is effectively improved under the premise of acceptable detection rate.It fully proves the rationality and effectiveness of the hardware acceleration architecture of image processing based on the PCIe interface studied in this paper.
Keywords/Search Tags:Image processing, hardware acceleration, face detection, PCIe, FPGA
PDF Full Text Request
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