Design And Verification Of SRAM FPGA Aanti-single Event Upset Reinforcement Based On Interleave Coding

Nowadays,Static Random Access Memory(SRAM)chips commonly used in aircraft have become an indispensable part of on-board electronic products,and the loss of critical storage data will cause serious harm to aircraft safety.Xilinx experimental test results and The Chinese Academy of Space Technology show that the storage cell based on SRAM is particularly sensitive to single event upset.Single event upset not only leads to unit flipping,but also leads to multi-bit flipping of single-event,especially multi-bit Upsets(MBU)caused by neutron and some particles colliding with storage devices have become one of the main reasons affecting aviation equipment.In order to improve the stability of SRAM storage unit,this thesis proposes different protection schemes for different error types.Different types of interweaving joint single error correction technology are used to realize anti-single bit upset and continuous multi-digit reversal,so that the design can meet the requirements of the reinforcement design of storage unit to correct common error types.The hamming code is adopted to resist single-bit upset flipping,and different hamming codes are adopted according to the size of stored data volume.When the data volume is large,(4120,4096)hamming codes are used to separate data bits and check codes and input them in parallel to improve coding efficiency.When the amount of stored data is small,the(21,16)hamming code is used to reduce redundancy and area overhead from the perspective of system implementation cost.To resist single-event continuous multi-bit flipping,different interleaver schemes are designed for error pattern types.When continuous multi-bit flipping only occurs in the same row,the(4120,4096)hamming code joint block interleaver corrects continuous 8-bit errors,and the idea of block interleaver is adopted to greatly improve the speed.When continuous multi-bit flips occur in physically adjacent positions and the error pattern is not fixed,a cyclic interleaver is constructed and the optimal solution is designed to maximize the correction ability.Combined with(21,16)hamming code,continuous 4-bit errors of arbitrary shape can be corrected.Finally,the single-frame reconstruction technique is used to build a fault injection verification system to simulate the real radiation environment and evaluate the effectiveness of the reinforcement design.In order to verify the validity of the system,the single-particle irradiation test and the fault injection test were carried out respectively,and the functional interruption cross section curves of the two tests were consistent,which laid a foundation for the subsequent evaluation of the reinforcement design of the storage unit.In the fault injection verification test,the reinforcement effect of(4120,4096)hamming code against single bit upset flip reaches56.82%,and the reinforcement effect of(21,16)hamming code combined with the optimal cycle interleaver against single-event adjacent multi-position flip reaches 57.41%,thus verifying the effectiveness of the reinforcement technology.The performance of SRAM storage unit against single event upset is greatly enhanced,the security of airborne electronic system is guaranteed,and the possible risks and economic losses are minimized.A convenient and feasible solution is proposed to enhance the defense ability of airborne electronic system against single event upset.