Research Of SRAM-based FPGA Single Event Effect Fault Injection System

Field programmable gate array(FPGA)based on static random access memory(SRAM)has a series of advantages such as low development cost,flexible use,and short development cycle.However,when high-energy particles enter the semiconductor device,they will ionize to generate electron-hole pairs,which will occur single event upset effect.In the case of single particle effect,it may cause calculation structure error,program execution sequence error,etc.,or even cause the system to collapse.With the wide application of FPGA in aerospace,the single-particle effect has an increasing impact on FPGA,so the research on FPGA single-particle effect has practical significance.In general,it is difficult to simulate the radiation environment of outer space on the ground.In order to study the single-particle effect of FPGA,the single-particle transient effect and single-particle flip effect of FPGA need to be studied separately.The state fault injection system and the single particle flip fault injection system simulate the single particle transient and single particle flip of FPGA through two systems.For the single particle transient fault injection system,this paper first analyzes the fault form of single particle transient pulse in FPGA,and analyzes the results caused by it,and proposes an equivalent model of single particle transient effect.According to the single particle The transient pulse width reaches the characteristic of picosecond level,and a single particle transient fault injection system based on IDELAY2 delay unit is designed.After generating picosecond-level transient pulses,the effects of different gate logic chains on transient pulses were studied,and it was found that the change in pulse width was related to whether the gate logic chain generated opposite logic.In order to further study the law of transient pulse propagation,this paper passes periodic pulses through different gate logic chains and finds that the pulse frequency has not changed,it can be concluded that the gate logic chain does not affect the width of the periodic signal.For the single-particle flip fault injection system,in order to simulate the single-particle flip effect in FPGA,on the basis of analyzing the FPGA single-particle flip fault form and the soft error mitigation controller(SEM)core structure,the internal configuration of FPGA is studied.The method of changing the configuration bits of thememory frame,that is,the research of FPGA-based single particle flip fault injection system.After building a single-particle flip test and verification platform,the principle of readback of the configuration memory is studied,and finally the ratio of the configuration bit changes of the configuration memory frame by the platform is obtained through fault injection.After further research on the soft error mitigation controller,this paper proposes a hybrid configuration refresh method.The experiment through fault injection system shows the effectiveness of this method.