The Research Of High Speed Data Acquisition System Based On FPGA

The current international situation is unpredictable, military power of countries is rising continuously, in order to improve air defense, this paper studies on testing the initiating time of the intelligent fuze which is set by Wireless channel, according to the measured projectile velocity's initial speed,the flying height,speed and direction of the enemy's aircraft.The thesis studies a kind of high speed acquisition that its sampling rate can reach to 100MSPS and can put into the small caliber projectile. Based on the introduction of the data acquisition theory, this paper puts forward the overall design scheme of the system: only one signal-ended-to-differential conversion chip; one high speed chip of ADC; and one FPGA to control ADC,FIFO and SDRAM; one storage chip of SDRAM. Then gives detailed presentation to the design of the analog acquisition circuit module,the software of the SDRAM and little power topology structure. The above part includes components'selecting principles and timing simulations. Then using related theory to study the fidelity of the high speed channel . Using Hyper Lynx software to simulate the design of the data acquisition board. This paper finally makes a functional verification for the system.This paper emphasizes on the principle diagram of the acquisition board,signal integrity,SDRAM controller based on FPGA. The system can work under the frequency of 100MHz by the system's test and functional verification. Finally, this paper makes a conclusion: The overall design can achieve the requirements of the prototype.