Verification Of MIPI CSI-2 Transmitter Controller Module Based On UVM

The CSI-2(Camera Serial Interface-2)protocol formulated by the Mobile Industry Processor Interface(MIPI)Alliance is the most mainstream camera serial interface standard at present.It has the characteristics of high performance,high scalability,low power consumption,low electromagnetic interference and so on,and is widely used in various embedded devices.The CSI-2can be based on the D-PHY or C-PHY physical layer developed by the MIPI Alliance.Current domestic studies on CSI-2 are mostly at the stage of using D-PHY as the physical layer,while the utilization of the more advanced yet complex C-PHY with higher transmission bandwidth and lower electromagnetic interference is still lacking,let alone a combination of both physical layers.With the continuous improvement of camera resolution,it becomes more and more necessary to optimize the transmission bandwidth between the camera sensor and the processor.The CSI-2 based on both physical layers can not only meet the increasing requirements of transmission bandwidth,but also be backward compatible with various camera devices.Therefore,verification work required by the design and implementation of this type of interface is of great significance to the entire camera chip industry.The CSI-2 protocol has strong scalability and high complexity.A combination of the two physical layer modes nearly double the required verification specification amount,putting forward higher requirements for the efficiency and completeness of verification.In this regard,a verification scheme with configurable stimuli is proposed.A reusable verification platform is built based on the most efficient and complete Universal Verification Methodology(UVM).And a coverage-driven verification method is adopted to complete the functional verification of the MIPI CSI-2 transmitter controller based on both D-PHY and C-PHY.In the verification process,the CSI-2 protocol specification and the specific design architecture of the design to be verified are analyzed in depth.On this basis,the verification features are extracted,and complete functional test points are further subdivided.Then,according to the verification requirements,the verification platform is built and the testcases are designed adopting a concept of hierarchical packaging.Finally,the functional coverage modeling is carried out around the functional test points.The verification process is systemically managed according to the collection status of the functional coverage.And the uncovered functional test points are further verified in a targeted manner.In order to improve the efficiency of verification,a configurable generation mechanism of stimuli is designed in this project.By passing variable parameters to sequences and testcases from the command line,various stimuli vectors can be constructed.Based on this mechanism,various test requirements can be met by configuring different parameters based on an individual testcase.After a large number of verification tests,the acceptance goal of functional verification is achieved by reaching a final code coverage and functional coverage of 99.76% and 100%,respectively,providing quality assurance for subsequent successful chip tapeout.The verification platform has a clear hierarchy and strong scalability,and some components have been reused in the system-level verification environment.The testcases can be flexibly configured,which saves verification workload and improves verification efficiency.