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Design And Implementation Of RF Basebandcircuit Verification Platform Based On UVM

Posted on:2017-05-23Degree:MasterType:Thesis
Country:ChinaCandidate:H R YeFull Text:PDF
GTID:2348330512952098Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
As the basis of electronic information industry, integrated circuit plays an important role in modern society. Under the promotion of social demands, chips will be promoted to the market in a short time. Therefore, it has higher requirements to semiconductor technology and design method. However, in the entire process of chip development, the verification work takes 70% of the total time, and even more. With the improvement of IP reuse, and semiconductor technology, the quantity of transistor that is integrated in the unit area is increasing rapidly in the development of integrated circuit, while the growth of verification technique is slow. Therefore, the verification work increasingly becomes a bottleneck of integrated circuit development. For traditional verification platforms, there are some problems exist in the circuit verification with millions gates as following:incorrect and inaccurate positing, omission of scenario verification and low efficiency, all these problems have consumed a lot of time. Therefore, how to find an automatic and reusable verification method with random constrain and strong expansibility has become an urgent issue that shall be solved in this industry.In the paper, through the study of traditional verification technology and new verification technology, it proposed coverage oriented verification thought based on UVM verification methods, On the basis of the UVM verification methodology, and integrated advanced technologies, such as transactional operation, stochasticconstraint and assertionmonitoring etc. All these technologies have been applied to the RF basebandcircuits. It is proved that this verification system has clear layers, it can monitor data in real-time, stimulate automatic generation, compare the results automatically. verification results show:chip valification process to reduce manual intervention and improve the contrast of the degree of automation, reducing the number of errors caused by manual intervention because.The code has high reusability and the coverage results can meet verification demands in a short time.
Keywords/Search Tags:UVM, RF baseband, system verificaiton, coverage-driven verification, rogressive selection verification
PDF Full Text Request
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