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Research Of CAN FD Controller's IP

Posted on:2022-10-02Degree:MasterType:Thesis
Country:ChinaCandidate:Y W LongFull Text:PDF
GTID:2518306737454204Subject:IC Engineering
Abstract/Summary:PDF Full Text Request
CAN bus protocol is a serial communication protocol introduced by Bosch in 1986.It mainly defines the specifications of both sides in data link layer and physical layer.The maximum transmission rate of CAN bus can reach 1Mbps,which is widely used in automobile communication network and industrial control.However,with the rapid increase of data volume in vehicular network,higher requirements are put forward for bus transmission rate.In this context,in 2011,Bosch launched CAN FD(CAN with Flexible Data Rate)protocol,which is translated into variable rate CAN.The improved CAN FD protocol overcomes the limitation of CAN,supports the transmission rate of more than1Mbps,and increases the maximum payload of data field from 8 bytes to 64 bytes.CAN FD inherits most of the traditional can characteristics,and can be compatible with CAN bus,which minimizes the hardware cost of upgrading can to CAN FD.This paper first analyzes the differences between CAN FD and CAN protocol,points out the characteristics of CAN FD and the main improvements compared with CAN,and analyzes the good development prospects of CAN FD in the future and the importance of its role in the vehicle network.Then,based on CAN FD protocol and international standard ISO-11898,the core logic of CAN FD controller is designed by hardware description language.Finally,the simulation results of each functional module after the front-end design are introduced.In the design process of the controller,firstly,the overall functional framework of the controller is determined according to the protocol and standard,and then the whole controller is divided into independent functional sub modules based on the principle of functional independence.The design process of the sub module includes determining the main input and output signals,drawing the basic sequence diagram,and writing Verilog code to describe the function.In the design process,verilog code and syntax checking are carried out by using Quartus?software,the FPGA development platform of Intel company,and simulation verification is carried out by Questa Sim software of Mentor company.The design difficulty of CAN FD controller lies in how to realize variable rate and how to sample data when the transmission rate is increased.After the functional modules of the controller are divided,the design difficulties focus on the bit timing module and bit stream processing module.The bit timing module generates the minimum time unit t_qused to process the timing relationship in the controller by dividing the system clock,and the data bits are composed of t_q.The way to achieve rate switching is to generate two kinds of pulse frequency t_q by dividing the system clock frequency,and realize rate switching by switching t_q in the data frame.In the case of high-speed transmission,there is a certain physical delay in the underlying transceiver and transmission link.When the controller is the transmitting node,it not only sends data,but also samples data from the bus.The sampling point needs to maintain a certain delay with the transmitting point to achieve the correct sampling.In the case of high-speed transmission,the time length of a single data bit can not meet the requirement that the delay between the sampling point and the transmitting point in the data bit is greater than the underlying physical delay.In the design,the secondary sampling point is determined by using the transmission delay cancellation mechanism to achieve the correct data sampling.Finally,the simulation results of each functional module of the controller are discussed and analyzed in detail,and the simulation results verify the correctness of the module design.
Keywords/Search Tags:CAN FD Controller, Verilog HDL, IP Core, Digital Circuit Design
PDF Full Text Request
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