A Full-speed USB2.0Device Controller IP Core Design

USB (Universal Serial Bus), referred to as USB, is a bus interface technology withfeatures of plug and play, high scalability, high speed stability and etc. Since the releaseof USB1.0protocol by USB-IF (USB Implementers’ Forum) in1996, USB technologyhas been developing rapidly; in2000, it is upgraded to USB2.0; in November2008, it isagain upgraded to USB3.0protocol. Now USB has been widely used in PC peripheralsand portable systems, so there have been urgent request proposed for the study andresearch of USB IP core. This article is to do research and design work of USB IP corein view of this situation,The function controller of USB device controller can be implemented in twodifferent solutions: one is to adopt the hardware; one is to adopt the microprocessor. Theadvantages of hardware implementation are high integrated level, high speed; thedisadvantages are complicated structure, not easy to upgrade. The advantage ofmicroprocessor implementation is better versatility and may, according to the differentneeds of customers, design different controllers, for the convenience of upgrade andtransplantation. The equipment controller designed in this paper is a universal USDdevice controller adopting MUCU6502to implement the function of controller.Basing on the micro processor implementation scheme, this paper designs a newfull speed USB2.0device controller. First, it analyzes the USB transmission principleand communication protocol in details, and studies the whole integral structurecomposition of USB device controller physical module. Then it adopts Top-Downprotocol to modularize the whole USB device controller, the main modules include:transceiver, digital physical layer, protocol layer, endpoint registers, data buffer andfunction interface. Further, it adopts Verilog HDL to rewrite the code for each moduleand write corresponding incentive test file, adopts Modelsim Modelsim simulationsoftware to do simulation verification. In the end, it adopts ISE13.1from Xinlix toconduct logical synthesis for the IP core of the USB device controller, which verifies thefeasibility of the IP core.