Construction And Design Of Verification Platform For Ethernet Transceiver Based On UVM

Since its birth,Ethernet technology has been widely used in wide area network and local area network.It is also widely used in communication system,industry,transportation industry,government research institutions and other equipment.Even in some complex and harsh environments,Ethernet communication for data confidentiality and strong reliability and other advantages are more prominent.However,for the support of a variety of protocols Gigabit Ethernet chip,its technical difficulty,high integration,high price,the related products have been monopolized by several foreign giant companies,the domestic market in supply has been subject to others,so the development of multi-protocol Gigabit Ethernet PHY chip localization is of great significance.This thesis first introduces the interface protocol and verification methods.Through the investigation of the working principle of Ethernet transceiver,the encodings and decoders of data channels at 10 M,100M and 1000 M rates,and the matching process of automatic negotiation under copper wire operation mode,the function points are divided and a detailed list of simulation items is developed.Secondly,the DAC/ADC module is modeled.At the rate of 1000BASE-T,the 4 pairs of twisted pair are extended to 8 pairs of twisted pair,and the signals on the twisted pair are modeled as floating point numbers to complete the conversion from analog signals to digital signals.Based on the test ideas,using the SV language UVM,the chip support for the various operating modes of structures,the single chip loopback platform for the verification and validation of the dual chip docking platform,the verification platform design process of the various components in the detailed instructions are given,by writing a makefile script,type the command to control the execution flow of the emulator,It improves the operability of the verification platform.For the problem of long simulation time waiting in the verification process,this thesis accelerates the pre-simulation by shortening the value of the corresponding counter,so that the link time after acceleration is greatly shortened.In the forced operation mode of 100base-t,it only needs 2ms after acceleration,which is one percent of the simulation time before acceleration.Sequence?lib and automatic comparison modules were established for the verification of hundreds of simulation items in the automatic negotiation module,which managed all the sequences according to the established rules and made it easy to call,so as to avoid invalid repeated workload.The success or failure of the automatic negotiation could be directly judged according to the verification report.Finally,the wave forms of simulation results of the data paths of each interface in the two operation modes of copper wire and optical fiber at different rates are given.The receiving and transmitting packets match each other,the data transmission is correct and meets the requirements of the protocol,and the verification is passed.The automatic negotiation module only lists the waveform of the simulation results under some modes,and the rest are similar.The final negotiation state is confirmed by comparing the verification report,which meets the expectation and is verified to be passed.Combined with the collection of coverage,the functional coverage rate reaches 100% and the turnover coverage rate is above 90%.The reasons are also given for the partially uncovered circuits.In summary,the verification work of Ethernet transceiver is realized through the verification platform built above.