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Design And Implementation Of Test System For Power Management Chip

Posted on:2022-09-07Degree:MasterType:Thesis
Country:ChinaCandidate:Q ZhanFull Text:PDF
GTID:2518306605990519Subject:Master of Engineering
Abstract/Summary:PDF Full Text Request
In recent years,with the rapid development of the semiconductor industry,the shipment of chips has increased rapidly.Our country has listed integrated circuit technology as a national priority industry,and chip testing technology,as one of the key technologies in the integrated circuit industry chain,is becoming more and more important.How to efficiently and accurately complete chip performance testing is a difficult problem faced by many chip manufacturers in chip mass production testing.At the same time,due to the impact of the chip manufacturing process,version batch,etc.,its internal modules will have a certain degree of deviation,which affects the performance of the chip.Therefore,it is necessary to trim the internal modules to improve the yield of the chip mass production test.This paper comes from a commercial project of an intern company.Based on the automated test machine V93000,a test system is designed for a power management chip.First,it introduces the basic theory of integrated circuit testing,and analyzes the working mechanism and control principle of DC-DC converter,the overall performance of the power management chip is studied,and secondly,introduced the basic structure,hardware resources and test operation platform of the V93000 test system,configured the basic test files such as level and timing,and completed the basic performance of the chip under test.The design of the test circuit board is improved.The trimming test method of the internal band gap voltage module of the chip to be tested is studied.The traditional full search trimming method is to test each trim code value,and select the trim code value that is closest to the ideal value and write it into the chip.This method is relatively time-consuming to test.To solve this problem,according to the characteristics that the network resistance of the tuning network does not affect each other,a weight search method is proposed.When the test accuracy is satisfied,the test time is shortened by 52.8% compared with the full search method.In chip mass production test environment,the chip to be tested is pre-trimmed,and the distribution curve under each trim code is obtained.The curve fitting method and the automatic tuning method are used to obtain the fixed trim code under different conditions.Compared with the weight search method,this method further reduces the action of register writing,and shortens the test time by 71.7% and 79.6% compared with the full search method.Finally,test cases are written for each test item of the chip to be tested.The test cases include efficiency test,load regulation test,switching frequency test,I2 C test and other test items that highlight the performance of the chip,and the test algorithm is optimized.In the frequency test part,the traditional frequency test method is improved,from the time domain processing to the frequency domain processing,the interpolation algorithm is used to optimize the results,the test results are more accurate,and the I2 C adapter driver is developed to enhance the reusability of the code.Finally,the actual test results of each test item are given,and the test results are analyzed to verify the reliability of the test plan.
Keywords/Search Tags:Test board, switching frequency, I~2C drive, trim
PDF Full Text Request
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