The Research Of Trim Technology In DC-DC Buck ATE Test

The accuracy of bandgap, reference voltage, bias current and frequency is very important in the performance of DC-DC Buck. However, because of process variations in semiconductor fabrication, there are some deviations in parameters such as voltage and current compared with the standard value. So we need to trim these parameters in ATE test in order to increase the yield of the product.The basic structure and operating principle of DC-DC Buck are analysed in the paper. As for bandgap trim and voltage reference trim, a resistor network circuit structure is described and as for bias current and frequency trim, a current mirror with multiple brances circuit structure is described. In the past, an algorithm called full search is used in trim test. This algorithm needs to test each trim step and find the best trim code before writing the code into the EEPROM, which takes a lot of time. In this paper an innovative algorithm called automatic trim algorithm is proposed to reduce trim test time. Automatic trim is able to generate a trim table according to the previous test value and in the following test, the program only needs to test the initial value and find the best trim code automatically according to the trim table. What’s more, the trim table can realize dynamic update to insure the accuracy of trim code.The characterization analysis and experiment results of 850 samples show that automatic trim algorithm can reduce 61.8%, 79.2%, 70.8% and 65.4% trim test time respect to bandgap, voltage reference, bias current and frequency trim test, and it can insure the accuracy of trim code as well.