Design And Implementation Of A Reusable External Communication Interface Verification Platform

In recent years,the integration and complexity of SoC(System on Chip)design have been continuously improved,and the requirements for SoC verification technology have also increased.Chip verification is an important part of the SoC development process.Traditional verification methods have poor standardization and low verification efficiency.It is particularly important to use scientific verification methods to improve the efficiency and completeness of verification.This article is based on the overall architecture of SoC,with the goal of improving verification coverage and verification efficiency,based on UVM(Universal Verification Methodology)verification methodology,combined with the characteristics of chip modulelevel verification and SoC system-level verification,select SoC system communication peripherals The interface module is a design under test(DUT),which builds a reusable external communication interface verification platform.The verification platform designed in this paper can add,delete and modify the component modules inside the verification platform according to different test requirements,and apply it to other peripheral interfaces or other chip projects.This improves the verification efficiency and shortens the chip development cycle.The main work of this paper is as follows:1.Based on the SoC chip architecture,using UVM verification methodology to build a verification environment,develop common components,and build a reusable UVM modulelevel and system-level verification platform.2.Choose SoC peripheral interface module UART as DUT,according to the characteristics of the bus protocol,clarify the verification ideas,decompose the test points,reasonably plan the use cases,and develop UART?UVC to apply to the above verification platform.Then,according to the verification scheme,the UART interface is verified by coverage-driven function and system-level verification with Cortex-M0 core.3.Platform reusability test.Develop the I2C?UVC component based on the peripheral interface I2 C protocol.Based on the architecture characteristics of UVM,replace the UART?UVC in the verification platform,build an I2 C verification platform,and implement basic functional verification for I2 C.4.Analysis of verification results.According to the simulation results printing,simulation waveforms,and functional code coverage,the results show that the verification platform is working properly,the UART and I2 C modules are functionally correct,and the coverage reaches the expected requirements,which proves the correctness and effectiveness of the reusable verification platform designed in this paper.