Efficient Verification Platform Based On UVM Methodology And Reusability

In recent years, with the3c products (Computer, Communication andConsumer electronics) gradually coming into people’s lives, their functionbecomes more and more diversified. Correspondingly, the design requirementof the core chip, used in these products, is getting higher and higher. And theworking capacity of verification accounts for more than70%in the chipdesign cycle, therefore, the importance of verification work is also gettingmore and more attention.Building verification platform is the core part of the verification work,which directly determines the success of chip design. The purpose of thisstudy is to build an efficient verification platform of OCP2AXI data busbased on the UVM theory, and to accomplish rapid error-convergence andcoverage goal in the limited project time.According to the characteristics of the project and the requirement of theverification, this study firstly researched and analyzed the industrymainstream verification language and method, and designed the verificationplatform by choosing UVM methodology, coverage oriented verificationmethod and “Elite” verification language. In the structural design, it improvedthe shortcoming that every input needs separate configuration script in thetraditional verification platform.Secondly, in the specific function module design, this study completedthe design from the Data Item to the Agent, and then to the environment, inaccordance with the bottom-up design method. Furthermore, it accomplishedthe functions such as testing excitation generate automatically, the scoreboardautomatic comparison results, etc.Finally, by abstracting general modules in this project, this study built ahierarchical public database including UVC level, module level, functionlevel and transaction level, and put forward the general usage of the publicdatabase. That laid the foundation for the important application of the testplatform in the subsequent projects. The verification platform in this study, has been applied in ourcompany’s latest chip and successfully completed the validation targets. Nowthe chip has entered the stage of flow sheet. At the same time, the hierarchicalpublic database has also been widely accepted by the engineers because of thestrong reusability and the function of improving the efficiency of otherverification platform.