CPU Chip Design Based On RISC-VISA(RV32I)

CPU is the core of electronic information technology,and CPU chip design based on the RISC-V instruction set architecture is becoming more and more important.The in-depth study of the instruction set architecture has become a hot spot in the current CPU industry.This paper focuses on the RISC-V instruction set architecture research and designs an RISC-V CPU chip based on the SMIC 0.18 um CMOS process.This paper gives an overview of the CPU system structure.The key design items,namely the pipeline and the branch prediction,are introduced.And the most popular CPU instruction set,including x86 architecture,MIPS architecture,ARM architecture and RISC-V architecture,are summarized.Considering the outstanding advantages of the RISC-V architecture,this paper designs a CPU chip based on its integer instruction subset RV32I.This paper analyzes the instruction characteristics of the RV32I instruction set in detail,expounds the working principle of the CPU based on the RV32I instruction set design,and finally introduces the working principle of each module and the code design through the structural block diagram of the sub-modules.It adopts modelsim to simulate the key sub-modules,which include ALU(arithmetic operation)module,decoder(decoding)module,EXE(execution)module and UART(serial port)module,using FPGA to verify the hardware of the instruction set function of the overall design of the CPU.Finally,it adopts the SMIC0.18 um CMOS process to realize the ASIC implementation of the designed CPU.The design process includes logic synthesis,static timing analysis,formal verification,automatic placement and routing,DRC and LVS and other steps.And finally the GDSII layout with a layout area of 5225618.75um~2,a highest chip clock frequency of 100MHz,and a power consumption of35.87m W based on the RISC-V RV32I architecture CPU chip is obtained.At the end of th paper,the total work and future prospects of this design are carried out.This paper studies the CPU design based on RISC-V ISA(RV32I),and performs Verilog code design,modelsim software platform verification,FPGA hardware platform verification on the CPU,and finally realizes the ASIC design implementation.This paper has laid a certain foundation to the design of an independent,safe and controllable general-purpose processor,and will contribute to China's integrated circuit industry.