Research On Acquisition,Display And Storage System Of A High Frame Rate Camera

In order to obtain high-precision dynamic deformation of large-scale spatial structure,highresolution industrial camera array is often used to achieve image information acquisition,storage and processing.The project aims at designing an acquisition and processing system for high frame rate cameras based on the Coax Press interface protocol,which provides a feasible solution for high precision dynamic deformation detection of large spatial structures.In this paper,an overall design scheme is firstly proposed based on the indicator requirements of the system.Considering the transmission rate of image data,system scalability,development cycle and other requirements,a scheme with the functions of high-speed data transmission,display and storage are determined,which consists of the Coa XPress interface,DDR3,BRAM,ADV7511,SATA interface,SSD,and So C control.This paper designs a high frame rate camera acquisition,display and storage system,which is mainly composed of four parts: acquisition part,cache part,display part and storage part.The collection terminal selects the Coa XPress interface with excellent performance indicators in all aspects,and completes the design work of the Coa XPress Host module according to the interface protocol.It mainly includes the design of key modules in the physical layer and the logical layer,which are used to realize the reading and writing of the device registers by the host and the disassembly and grouping of the streaming data packets.As for the part of the cache,a high-speed and large-capacity cache system is designed by combining the advantages of BRAM and DDR3.Besides,a time-sharing reading and writing method based on single DDR3 is proposed,which increases the speed and decreases the cost.The part of the display takes ADV7511 as a data transmitter and the processed data will be transmitted and displayed by ADV7511 Controller in So C to HDMI interface.According to the SATA serial protocol,the storage part completes the design of the SATA Host module,including the physical layer and logical layer design,which is used to achieve high-speed storage of data at the buffer end.Finally,this paper verifies the overall design scheme through experiments.Firstly,the Coa XPress acquisition function was simulated and tested.Through the Coa XPress Host,the host's configuration of device registers and the processing of streaming data packets were realized.Secondly,the Coa XPress data collected by simulation are cached and processed.The feasibility of the scheme of cache,display,and storage is verified by the related experimental phenomena and parameters.The overall experimental results show that the logic function of the system is correct and the data transmission is normal,which has no packet loss,error code,etc.The transmission performance meets the expected requirements on the basis of the existing hardware.