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Research And Implementation Of SOC Test Structure Based On IEEE 1687

Posted on:2022-05-09Degree:MasterType:Thesis
Country:ChinaCandidate:B Y SongFull Text:PDF
GTID:2518306554968819Subject:Master of Engineering
Abstract/Summary:PDF Full Text Request
The research of SOC test structure is an important subject in the research field of design for testability.SOC integrates the internal central processor cores,the storage unit more complex unit,a communication interface,and an internal bus specific function circuit.In order to improve the testability of the chip,it is usually necessary to add a test structure inside the SOC.IEEE 1687 standard proposed,within the chip SOC corresponding to different test units,chip manufacturers provided different test functions of the test instrument,the test is completed within the chip.Through the JTAG interface of the SOC,the test controller uses the TAP controller to drive the instruction register to output instructions,access the network of different levels of structure,open the target SIB,and realize the control and access to the internal test instrument through the test data register,which makes the performance of the SOC test more controllable.The design implements a single-layer network structure based on the IEEE 1687 standard.The test structure covers hardware structures such as the SIB structure,test data register structure,and single-layer network connection structure defined in the IEEE 1687 standard.The design realizes the on-chip single-layer network structure,and proposes an improved TAP controller and an improved instruction register structure.Use the external test mode selection signal to select the built-in instructions in the instruction register to realize the configuration of the SIB link and thus realize the access to the embedded test instrument.Designed and implemented a multi-layer test network based on the IEEE 1687 standard.On the basis of single-layer network structure,a modular design scheme of multilayer network structure with SIB link as the core is proposed and designed.The design improves the structure of the multi-layer network TAP controller and the instruction controller,and realizes the decoding of the internal instruction encoding state through the external test mode selection signal.The design structure can meet the needs of a large number of,multiple types,and multiple priority test access.The design realizes a composite network based on the IJTAG structure.Based on the IJTAG architecture,combined with the basic structure,single-layer network structure,and multi-layer network structure,a multi-functional and multi-purpose composite network design is realized.The composite network structure uses traditional JTAG as the external interface,and the top-level TAP controller structure is designed to realize the traditional JTAG mode and IJTAG mode multiplexing function.At the same time,the IJTAG controller is used to control the selection of IJTAG access status.In this paper,the single-layer network structure,the multi-layer network structure and the composite network based on the IJTAG structure based on the IEEE 1687 standard are simulated and verified respectively,and the validity of each structure design is proved.The design verification of different test structures based on the IEEE 1687 standard is realized,which meets the requirements of increasing the controllability of SOC internal tests.
Keywords/Search Tags:SOC testing, Design for testability, IEEE 1687, Joint test working group, Internal JTAG
PDF Full Text Request
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