Design Of AXIe Carrier Board For Wideband Multichannel Transceiver Module

As the application of automated test systems become are being widely used,the requirements of test functions for complex tested equipment in site are getting high.Ordinary buses can hardly meet the needs of automated test systems.Advanced bus technologies are urgently needed in new types of testing tasks and speed.A new bus standard in automated testing system has been developed: the AXIe bus standard,which was established on the ATCA standard.The AXIe bus standard can support data transmission for both the PCI Express interface and the LAN interface,which makes LXI and PXI testing systems can be compatible with the AXIe system.Given the background,this thesis studies the AXIe standard bus under testing architecture and instrument module,and establishes an AXIe instrument module structure that connects a dual-channel broadband acquisition module and dual-channel high-speed waveform generation module.This thesis designs a carrier board.The main work of this thesis is summarized as follows:1.This thesis investigates the AXIe protocol and ATCA protocol,and studys their architecture and electrical characteristics with the ZYNQ 7020 chip as the core.By creating communication with the AXIe chassis though the area 1 from the backplane.This thesis couducts the hardware design and software design of the carrier board's intelligent platform management controller(IPMC),tests and validates the IPMC's function and module's management.2.With the XCKU060 chip as the core,this thesis designs a two-way high-speed data communication mechanism between the AXIe carrier board and the daughter modules,and communicates with the AXIe chassis through the area 2 from the backplane.This thesis completes the communication between the carrier board and the AXIe chassis software based on the PCI Express links,and achieves the control of the high-speed data flow of the entire board by the host computer software.The GTH links and LVDS links create the communication between the carrier board and the transceiver modules.The above links create the communication of the high-speed data stream between the chassis software and the multi-channel transceiver modules.This thesis couducts the hardware design and software design of the carrier board in high-speed data flow communication module,and tests the integrity of the data links.3.The carrier board receives the timing and trigger resources from the AXIe chassis,and feeds them to the data acquisition sub-board and the waveform generation sub-board to ensure that the AXIe chassis can provide the clocks,triggers and synchronization resources to the single board and multi-boards.This thesis completes the hardware design and software design of the carrier board in clock,trigger and synchronization module,and tests this module's function.At the end of this thesis,a testing platform was builted.By using oscilloscope,vector signal source,arbitrary waveform/function generator,spectrum analyzer and other instruments to test the functions of the carrier board together.The results show that all modules of the carrier board work normally and meet the design goals.