Design And Interface Implementation Of Universal High-speed Signal Processing Platform

The traditional signal processing platform is unable to meet the requirement of high-speed signal processing for flexibility because of its insufficient repeatability and lack of versatility.According to the actual demands,a high-speed signal processing platform scheme based on VPX architecture is designed,and the data storage and transmission technology in the platform is realized.The platform uses high-performance FPGA as signal processing chip to realize the parallel processing of signal s.It uses DDR3 SDRAM to store the data,and uses GTX to transmit the high-speed data.The platform has good expansibility and versatility,which has strong ability of signal processing,storage and transmission.Aiming at the large number of data cache in the platform,the FPGA-based DDR3 controller is designed by using the MIG IP core provided by Xilinx.Based on the analysis and design of the MIG core user interface,the read and write control of DDR3 is realized.Then the self-checking model is designed and the hardware tests of the controller are completed.The results show that the sustained read and write speed is 3.2GB/s of the DDR3 when its main clock frequency is 800 MHz,which is enough to meet the requirement.The controller has better flexibility and portability,which can be flexibly applied into different projects.GTX is used to transmit data between FPGAs in the platform.The design of high-speed serial transmission is completed by using t he GTX transceiver as the physical layer,and using the Aurora 8B/10 B as the communication protocol.The IBERT tool is used to conduct a physical test of the GTX hardcore to ensure the connectivity of the channel.Then the hardware tests of data transmission within board and between boards are completed.The results show that when the link rate is 3.125 Gbps,the data transceiver is consistent,and the bit error rate is on the order of 10-12.By means of serial transmission,the signal crosstalk and interference are reduced,and the quality of high speed data transmission is improved.Finally,the joint tests of the DDR3 controller and Aurora 8B/10 B serial transmission are carried out on VC707 development board.The results show that both of them can work properly and meet the design requirements.