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Design And Implementation Of High-speed EMMC Array Data Storage System Based On FPGA

Posted on:2020-06-01Degree:MasterType:Thesis
Country:ChinaCandidate:J B LaiFull Text:PDF
GTID:2518306512456614Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
Synthetic Aperture Radar(SAR)is an all-weather,all-day high-resolution microwave remote sensing imaging radar widely used in military and civilian applications.In recent years,with the development of synthetic aperture radar technology,the improvement of imaging quality and imaging resolution requirements,the data rate and data volume of radar echoes have greatly increased,which puts higher requirements on data storage.Therefore,it is of great significance to study high-speed,large-capacity data storage systems.Based on the background of airborne synthetic aperture radar,this paper designs and implements a high-speed eMMC array data storage system based on FPGA.This paper mainly carried out the following aspects: Firstly,the radar data storage system is analyzed,and the specific functional requirements and requirements are put forward.The implementation scheme of FPGA-based high-speed eMMC array data storage system is designed.With FPGA as the main control chip,the array is composed of 8 eMMC chips,and the parallel operation mode is adopted to improve the system bandwidth and capacity.Two sets of DDR3 are used as the cache chip,and the ping-pong operation is used for reading and writing control,which solves the problem that the instantaneous rate and the storage rate are not matched.The optical system and USB3.0 are used as the external data interface to realize the storage system and the external board or Data transfer between devices.Secondly,according to the overall system design scheme,the hardware circuit design of the board is carried out,and the specific circuit diagram and PCB design process are given,and the physical board is realized.Then,using the modular idea to design and implement the software,the three modules of eMMC5.1 main control logic,DDR3 cache logic and USB3.0transmission are designed.The logic design scheme and workflow of each module are elaborated and passed.Verilog programming realizes the functions of each module.The eMMC5.1 main control logic module designs two working modes of HS200 and HS400.Finally,using the vivado software and the embedded logic analyzer,the system is debugged and read/write speed tested,and the debugging results and speed test results are given.The FPGA-based high-speed eMMC array data storage system designed and implemented in this paper has been verified and tested.The data storage rate reaches 0.9GB/s in HS200 mode,1.2GB/s in HS400 mode,and the storage capacity reaches 512 GB,which satisfies the storage system.The functional requirements and indicators require fast storage,large storage capacity and high reliability.
Keywords/Search Tags:High Speed Data Storage, FPGA, eMMC5.1, DDR3, USB3.0, HS200, HS400
PDF Full Text Request
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