Research On Programming Method And Compiler Front-end Design For Hybrid-grained Reconfigurable Architecture

There is an increasing demand for the efficiency and flexibility of computing systems.Reconfigurable processors have both the computational efficiency of application-specific integrated circuits and the programming flexibility of general-purpose processors,which have received widespread attention in recent years.Fine-grained reconfigurable architecture(FGRA)is configured at the bit level and has good configuration flexibility.Coarsegrained reconfigurable architecture(CGRA)consists of a large number of functional units which support common word-level operations.CGRA achieves higher performance when accelerating high-throughput applications.The hybrid-grained reconfigurable architecture combines the advantages of FGRA and CGRA,and it is an ideal platform for future computing-intensive applications.For hybrid-grained reconfigurable architecture,this thesis proposes a programming language extension scheme that support fine-grained computing and parallel execution of multiple reconfigurable processing units,and implements the compiler front-end.In order to take advantage of the different granularity reconfigurable resources in this system and the multiple reconfigurable processing unit(RPU)resources in the coarsegrained reconfigurable array,fine-grained keywords are added and FGRA programming interface is provided in the compiler front-end,and in this thesis multiple RPUs are executed in parallel by specifying RPU execution and asynchronous call mode.To make full use of executable resources,this paper proposes three types of parallelism-related programming syntaxes for different applications based on the characteristics and the computing model of the architecture,which simplifies the programmer's programming work and improves programming efficiency.Keywords are used to mark code of different grain architectures,and a new compiler based on the Clang system is developed.The compiler front-end uses the program written in the extended programming language as input.When the compiler recognizes the keywords,it automatically extracts the marked parallel code segments and presents them as a specific form of intermediate representation language.The intermediate representation is provided to the compiler backend for subsequent processing.This paper implements functional verification and performance analysis on this language extension scheme and the compiler front-end.The functional correctness of the compiler front-end is verified from three aspects: FGRA interface function verification,designated RPU call function verification,and coarse-grained multi-tasking function verification.The compiler front-end compiles source program with the above functions and successfully generates the correct intermediate representation.The typical computationally intensive algorithm is used to evaluate performance,and compiled by the developed compiler in this paper.The results show that,CGRA has achieved 5 to 53 times performance acceleration for different applications compared to general-purpose processors.In this thesis,the function correctness of the compiler front-end is verified;the rationality and feasibility of this programming language extension scheme and the compiler front-end design is proved.