Research And Design Of High Precision And Low Power Sigma-Delta Modulator

With the rapid development of electronic technology,high-precision measurement system requires higher accuracy and lower power consumption for the performance of analog-to-digital converter(ADC).Based on the special oversampling technology and noise shaping technology,the oversampling sigma delta ADC has the advantages of high speed,high precision and low power consumption,which is the first choice of high-precision ADC.As the core module of sigma delta ADC,the noise shaping performance of sigma delta modulator determines the highest accuracy of the whole converter system.In this thesis,the research and design of sigma delta modulator,which is the core circuit of sigma delta ADC,is mainly focused on:(1)The system modeling and behavior level simulation of sigma delta modulator are completed,and the influence of non ideal factors on the performance of sigma delta modulator is fully considered.Then,the system model of sigma delta modulator with non ideal factors is built.The results show that the SNR of the modulator is 128.6d B and the effective bits are 21.07 bits,The output swing of the three-stage integrator is not overloaded,and the circuit model works normally.(2)The circuit design and performance simulation of sigma delta modulator are completed.In order to improve the accuracy of sigma delta modulator as much as possible,a chopper stabilization circuit is designed in the first integrator to suppress the interference of flicker noise and offset to the first integrator.The internal operational amplifier uses a folded cascode structure with high speed and high gain,and uses PMOS as input pair to reduce 1/f noise.The capacitor passive adder is used to sum the feedforward circuit,and the class AB latch comparator with high speed and low power consumption is used to reduce the power consumption of the whole circuit as much as possible.When the input signal amplitude of the modulator is 500 mv and the oversampling rate bit is 256,the SNR of the modulator is 120.9d B,significant digits reached 19.79 bits,the power consumption of the whole modulator system is 3.65 m W ?(3)Based on SMIC 0.18 um The layout design,drawing,verification and post simulation of sigma delta modulator system are completed in COMS process.The supply voltage of the whole modulator system is 1.8V,with an area of 0.022mm2 The simulation results show that when the input frequency is 12 KHz and the amplitude is 500 mv,the SNR of the modulator system is 118.8d B,the corresponding effective digits are 19.44 bits,the consumed circuit power consumption is 3.65 mW...