Integrated Circuit Aging Monitoring And Its Adaptive Anti-aging Design

With the development of semiconductor technology,the Integrated Circuit(IC)process has entered the stage of deep submicron,and the circuit has significant advantages in performance,area and so on.However,at the same time as device size is reduced and circuit integration is improved,the parasitic effect that could be ignored becomes more and more serious,which aggravates the circuit aging.Aging effect has an increasingly prominent influence on circuit reliability.Under the influence of aging effect,the threshold voltage of transistor increases,the turnover speed of logic gate slows down,and the circuit delay increases,which leads to timing violation and circuit failure.Performance stability is the key index of IC equipment reliability,so it is the key technology to maintain the excellent performance of the circuit in the normal life and delay the aging of the circuit.In this paper,the effect of Negative Bias Temperature Instability(NBTI)on circuit performance is revealed by in-depth study on the aging mechanism of integrated circuits.On this basis,novel aging monitoring technologies and schemes are proposed,and corresponding solutions are proposed in terms of aging degree quantification and adaptive repair.The research content mainly includes the following parts:1.Design of aging monitoring circuit based on voltage comparison.For early warning of circuit aging and meet different design tolerances,a novel circuit aging monitoring scheme was proposed by studying the aging monitoring principle and combining with the working characteristics of voltage comparator.The scheme converts the aging deviation into voltage signal,compares with the reference voltage,and outputs the aging alarm signal through the comparator.The results show that the circuit has correct logic function,adjustable detection interval margin and certain flexibility.2.Design of high precision aging monitoring circuit based on look-up table.In order to accurately measure the aging degree of circuit,it is necessary to quantify the aging information.In this design,the aging model of Voltage Controlled Oscillator(VCO)frequency degradation and Voltage drop is established,the aging sensing circuit is used to generate the reference frequency and aging frequency,and the frequency difference signal is obtained through the phase amplifier circuit,which is quantified by counting the reference VCO cycle.In the end the aging information is output by voltage according to LUT rules.The results show that the resolution of the circuit is 0.0018%,at the same time,the relative error between the aging model and the simulation data is within 9%,which can realize the function of circuit aging monitoring.3.Design of anti-aging circuit design based on cuckoo algorithm.In order to maintain stable circuit performance,it is required that the design not only has the ability to monitor the circuit aging,but also has the ability of adaptive adjustment.Through a large number of statistical data in advance to establish a look-up table,the aging data is collected and quantified by the quantization module,which as the index address of the look-up table,the corresponding stored data is then invoked as the initial input to the adaptive module.The global optimization ability of cuckoo algorithm is utilized to output the optimal value within the preset range.Finally,the Circuit Under Test(CUT)parameters are adjusted by feedback to achieve the purpose of anti-aging.The results show that the design resolution is 0.004% and the adaptive adjustment time is about 1.8us,which has a certain degree of adaptability to alleviate the aging of the circuit.In this paper,the proposed circuit design is under 65 nm CMOS process at TSMC,mainly uses Cadence and Synopsys EDA software tools to implementation.The results show that the proposed design not only has correct logic function,but also has good performance indexes in design structure and precision.