Design And Implementation Of A Large Bandwidth Baseband Board Based On FPGA

Nowadays,the rapid development of wireless communication has put forward higher requirements for high-speed signal transmission.In today's 5G communication,the backhaul network and the fronthaul network are mostly transmitted by optical fiber,and the use of wireless transmission is less due to the large capacity of optical fiber communication.It is more difficult to design wireless transmission to achieve the same capacity,but it still has the advantages of low price,short construction period,good adaptability,good scalability,and good maintainability,which is better than optical fiber transmission under certain conditions.In 5G communication,signal backhaul requires a transmission rate of 10Gbps,and signal forward transmission requires a transmission rate of 25Gbps.The large capacity of optical fiber communication makes it easy to achieve the transmission rate goal,and the sampling rate of the data converter in the baseband part of the wireless transmission is not enough.Insufficient bandwidth is a problem that limits the realization of wireless fronthaul.This subject has designed a board hardware platform that can be used for wireless backhaul and wireless fronthaul baseband.This board is based on FPGA as the main control,and a large bandwidth baseband board designed with high-performance data converters and high-precision phase-locked loops.card.First of all,this paper analyzes the requirements of the board and selects the key chips,and completes the overall architecture design of the system.In terms of data transmission,the fronthaul network requires a transmission rate of 25Gbps.If 64QAM is modulated,the signal bandwidth of 5G.According to the Nyquist sampling theorem,the data converter on the board must reach a sampling rate of 12GSPS.The limitation is the ADC chip.The current ADC chip with the highest performance of TI only has a sampling rate of 6.4GSPS.So this paper adopts the dual AD interleaved sampling method to design the receiving link,so that the sampling rate of the board can be in a single ADC.The sampling rate is doubled on the basis of 12.8GSPS,which can meet the design requirements.In terms of data processing,the physical layer uplink and downlink data processing parts such as encoding,decoding,scrambling,descrambling,and modulation and demodulation are required.According to the comparison of data processing resources,the XCKU040 FPGA chip of Xilinx is selected.Secondly,the schematic design and PCB design of the board are carried out.The schematic design part is divided into five modules,including FPGA and its peripheral circuit design,receiving link design,transmitting link design,power supply system design,and clock system design.FPGA and its peripheral circuit design are based on the data processing capabilities of the board.The design of the receiving and transmitting link is designed for the data transmission capacity of the board,and the design of the power supply and clock system is the basic design for the normal operation of the board.The PCB design part is mainly divided into three aspects:laminated structure,layout and wiring,and introduced the design principle and the final effect.Finally,the circuit debugging and function test of the baseband board obtained through plate making and welding are carried out.In the debugging part,debug the board power module first,and then debug the main control part of the clock module FPGA after normal power-on.After solving various practical debugging problems and all main functional modules have been fully commissioned,the link transmission function of the board is tested.Four types of tests were performed on the boards,including receiving link testing,transmitting link testing,board self-loopback link testing,and dual-board transceiver link testing.Finally,after several link tests,it has been verified that the data link transmission function of the baseband board is successful.