The Research On Error Correction Method Of NAND Flash Based On BCH And LDPC Algorithm

With the advancement of the information technology revolution,the information industry has put forward higher and higher requirements for the storage and processing of massive data.NAND FLASH has become the main choice of modern storage systems by virtue of its advantages in capacity and speed.Considering the possibility of bit flipping of data on NAND flash storage media,it is very important to choose to use error correction algorithms with strong error correction capabilities such as BCH and LDPC to ensure data accuracy and system reliability.Aiming at the two situations of error code distribution,this paper designs and optimizes the parallel BCH error correction system and LDPC error correction system with modular thinking.When the error rate is extremely low,for example,SLC-based storage devices can use the BCH error correction system to eliminate the impact of bit flips;when the error rate is high,for example,MLC and TLC-based storage devices can apply the LDPC error correction system to complete the correction of the dislocation.In terms of BCH,the principle and realization method of coding are first explained.Secondly,in the error detection module,it is proposed to use resource reuse and structure sharing technology to reduce hardware consumption.In order to reduce the amount of calculation and increase the calculation speed,a non-inversion method based on the calculation of the polynomial coefficients of the error location based on the look-up table and the tree structure is proposed.Finally,the use of early termination method and reduced root distance method can significantly reduce power consumption and increase decoding speed.In terms of LDPC,we first analyzed and discussed the structural ideas of its codec,and then proceeded from the perspective of hardware implementation,taking the QC-LDPC code with low coding and decoding complexity that can provide sufficient parallelism and flexibility as the design basis,using Its sub-matrix is a characteristic of a cyclic structure,and its core calculation structure is reused during encoding,so the design process can be greatly simplified and rapid encoding can be achieved.The decoding scheme adopts the normalized minimum sum algorithm with faster calculation speed and applies practical layered decoding technology,which can realize the simultaneous update and transmission of multiple check equation related messages.Finally,for some special application scenarios that require data accuracy to reach a high level,an error correction scheme that can use the BCH+LDPC cascade with better error correction performance is proposed.The experimental results verify the feasibility of the scheme and the effectiveness of the efficient encoding and decoding algorithms.