Design And Research Of Hybrid Pipeline ADC In Voltage Domain And Time Domain

Analog to Digital Conversion(ADC)plays an important role in computer data processing,man-machine interaction,signal processing and other aspects.With the development of consumer electronic products,communication systems and other fields,higher requirements are put forward for ADC performance parameters.Improvement of pipeline ADC structure is a common method to improve ADC accuracy and conversion speed.However,no matter how the structure is optimized,the errors caused by temperature,pressure and electronic devices cannot be eliminated.This requires the analysis of ADC errors,and the design algorithm is calibrated and optimized for target errors to improve ADC performance parameters.In this paper,the ADC structure has been optimized on the basis of traditional pipeline ADC,and the error of the margin amplifier has been calibrated in the following work:(1)Based on the traditional pipeline ADC structure,this paper designs and builds a 10-bit pipeline ADC simulation model in MATLAB / Simulink platform,and completes the model simulation.(2)To solve the problem of low conversion accuracy of pipelined ADC,a pipelined ADC structure with voltage domain and time domain has been designed.The sample-hold circuit,MDAC structure,sub-ADC,sub-DAC,operational amplifier and other structures are selected and designed,and the structures such as voltage-time conversion,time-digital conversion and time quantizer are designed.The above structure is inserted into the simulation model of the 10-bit pipeline ADC,and the mixing of voltage domain and time domain is completed and the simulation experiment is carried out.The simulation results show that when the sampling frequency is 100 MHz and the input frequency is 40 MHz,the ENOB of the ADC with two-domain mixing is improved by 1.29 bit,SNDR by 13.66 d B and SFDR by 14.09 d B compared with that of the ADC with traditional structure,which verifies the effectiveness of the method.(3)Aiming at the errors caused by margin amplifier in two-domain hybrid pipeline ADC,a margin gain error calibration algorithm has been proposed.This algorithm designs a two-channel loop calibration method,introduces the auxiliary amplifier,constructs a new estimated gain path,and makes the MDAC output be sampled by the pipeline after the gain error of the amplifier is calibrated.The simulation results show that when the sampling frequency is 100 MHZ and the input frequency of 40 MHZ,compare the parameters before calibration and after calibration,the ENOB is improved by 1.65 bit,SNDR by 41.25 d B and SFDR by 42.97 d B,DNL and INL also have obvious optimization.The margin gain error of pipeline ADC margin amplifier is reduced and the overall accuracy is improved,which verifies the effectiveness of the method.