Construction Of Virtex-5 FPGA Chip Resource Diagram And Analysis Of Placement And Routing Based On VPR

With the rapid development of domestic science and technology,in recent years,FPGA chip technology has been greatly improved and developed in China,and widely used in high-tech core system design fields such as communication satellite and manned spaceflight.At present,the research on FPGA mainly focuses on the abstract tool set of FPGA CAD in the academic field.However,due to the relatively single structure of the chips studied in the academic field,the simple and relatively few types of wiring resources,it is difficult to apply to the FPGA commercial chips with complex functions and large scale.Therefore,in this paper,the FPGA chip is studied deeply,and some processes of VTR process are analyzed.At the same time,the corresponding resource description attributes and function modules are added to improve the application in commercial chips.Based on the VPR tool and the xc5vlx30ff676 chip of Virtex-5 series,this paper studies and analyzes the whole FPGA CAD development process,and constructs the structure model of the corresponding chip through the resource information provided by the user manual issued by Xilinx company and the resource library file information exported by Torc tool.At the same time,based on the VPR(Versatile Placement and Routing)tool in the academic field,corresponding analysis FPGA The process of placement and routing in the process of CAD development.The simulated annealing algorithm in the process of placement and the Pathfinder algorithm in the process of routing are studied and analyzed in detail.According to the multi-core parallel simulated annealing algorithm,the placement process is optimized and the routing process is optimized by using the router.Through the research,analysis and design of these algorithms,Virtex-5 is realized The placement and routing process of series xc5vlx30ff676 chips.In this paper,the resources of the Virtex-5 series xc5vlx30ff676 chip are modeled and the correct routing resources are generated.At the same time,MCNC standard circuit and VTR circuit are selected to test the placement and routing on the Virtex-5 series xc5vlx30ff676 chip,and the experimental results are analyzed in detail.Through experiments,the logical units and connections in the circuit can be placed out and routed on the chip under the constraints of physical resource use and placement and routing,and finally the legitimate and correct placement results and routing results can be obtained.