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Improvement And Development On Algorithms For FPGA Placament And Routing

Posted on:2011-04-25Degree:MasterType:Thesis
Country:ChinaCandidate:A J CuiFull Text:PDF
GTID:2178330332488343Subject:Computer software and theory
Abstract/Summary:PDF Full Text Request
FPGA architecture description method based on XML separates the FPGA chips from placement and routing tools. Thus, for different FPGA chips, the placement and routing can be achieved by redefining the architecture description files without changing placement and routing tools. Based on the description method, the new placement and routing tool is developed. Excepting for the single driver routing, both homogeneous and heterogeneous FPGA are supported within the tool.Meanwhile, based on the current placement and routing algorithms, an improved routing algorithm is proposed. When dealing with the difficult routing problems, the running time is decreased by 10%. Moreover, the chip editor function is added to the placement and routing tool for easily adjusting the position of logic blocks. This brings much convenience to users. In addition, the new algorithm is used within the chip editor.
Keywords/Search Tags:FPGA, Placement, Routing, Placement and routing algorithm, Chip editor
PDF Full Text Request
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