Research On FPGA Architecture And Placement Routing Algorithm

An FPGA architecture description method is designed in the thesis to solve the problem of describing FPGA architecture. The method can be used to establish FPGA architecture model. Ten parts of information are contained in it, such as logic block information, wire segment information and so on. When using different FPGA chips to place and route, it only needs to use the method to redefine the FPGA chip architecture, without changing placement and routing tools.The current academic partitioning netlist algorithm is improved to generate the LUT configuration information for FPGA programming and downloading. The placement and routing algorithm are also improved to support the commercial FPGA architecture. And a placement routing tool is developed to generate placement files, routing files and inner connecting files, which has the same routing capacity as that of VPR. The improved placement algorithm can decrease the times of swaping logic blocks by 23%. The four parts are the necessary information which can be used for FPGA chip programming and downloading.