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Design Of Miniaturized Image Acquisition And Preprocessing System Based On FPGA

Posted on:2021-07-29Degree:MasterType:Thesis
Country:ChinaCandidate:Z WangFull Text:PDF
GTID:2518306047987089Subject:Master of Engineering
Abstract/Summary:PDF Full Text Request
In recent years,with the rapid development of intelligent equipment,security monitoring and other fields,image processing equipment is turning to miniaturization,intelligence and diversification,and the processed image also changes to a higher frame rate,high resolution and high dynamic range.The traditional processing equipment with large volume,poor scalability and slow processing speed is difficult to meet the needs of today's image processing.In view of the above problems in image processing technology,the thesis designs a set of miniaturized real-time image acquisition and processing equipment based on FPGA.The device uses a separate hardware design.The overall structure includes three independent modules,and is compact and extensible.In addition,the device takes FPGA as its computing core,and realizes the real-time enhancement of the acquired image by using preprocessing algorithm pipeline.The main contents of thesis are as follows:(1)Pipeline design of image preprocessing algorithmFor the limitations of using a single algorithm to process sensor output images,the thesis designs an image processing pipeline structure including various pre-processing algorithms such as de-noising,de-mosaics,automatic white balance,detail enhancement and automatic exposure,etc.Through the continuous processing of multiple algorithms to achieve effective enhancement of the image acquisition.The thesis also improves the algorithms used in some pipeline nodes.In the study of gradient interpolation to remove mosaics algorithm,the thesis improves the solving method of directional derivative of image and the interpolation method of red and blue information,which increases the image boundary restoration quality and the robustness of the algorithm.In the study of the automatic exposure algorithm,the thesis proposes an automatic exposure algorithm based on brightness mean and brightness histogram,which optimizes the way of adjustment and judgment of exposure parameters and reaches the engineering use standard.In addition,the thesis improves the filtering template structure in the denoising method and the detail enhancement algorithm to optimize the speed of the algorithm.(2)Hardware design of miniaturized image acquisition and processing system with separate structureAiming at the design requirements of miniaturization and expandable function of equipment,a separable hardware design scheme is proposed in the thesis.According to the plan,the entire system hardware consists of three circuit boards with independent functions and the same size,including the image acquisition input circuit based on CMOS sensor,the image processing circuit based on FPGA and the video image output expansion circuit of HDMI.The cross-sectional size of the entire system is 42mm*40mm,meeting the design requirements of miniaturization.In addition,by using this separate structure of the hardware system,when the design requirements change,the designer only needs to replace the corresponding functional circuits without redesigning.That reflects the flexibility of the system.(3)The realization of the function of miniaturized image acquisition and processing system based on FPGAIn response to the requirements of the system on the calculation speed,the thesis uses FPGA with a high degree of parallel computing capability to implement the three parts of the system's acquisition,processing and output functions.The acquisition function completes the configuration of the CMOS image sensor and the reception of high-speed LVDS image signals.The algorithm processing function realizes the image processing pipeline,completes the management of the image data flow using the AXI4-Stream bus,and implements the multi-port memory access structure and memory access management unit based on the AXI4 bus.The video output function enables the processed images to be output in a standard format with a 1080p resolution of 60 Hz frame rate.Based on the detachable modular structure,the thesis independently developed a small-scale image acquisition and preprocessing system with FPGA as the core to finally achieve the acquisition and enhancement of the sensor input image.The equipment can be applied to machine vision,intelligent industry,military science and technology,etc.,and has relatively important engineering practice significance.
Keywords/Search Tags:Image preprocessing, Image processing pipeline, Miniaturized design, FPGA, Logic design
PDF Full Text Request
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