Design And Realization Of The Binocular Image Preprocessing System Based On FPGA

Image acquisition and processing plays an important role in modern multimedia technologies.However, due to different image acquisition tools or methods of gathering, images cannot fully reflect all the characteristics of the objective world. Therefore, the image preprocessing is very important. Today the world has entered the era of digital information, various forms of information stored digitally in a variety of medium, more and more information began to transition from traditional analog storage and processing to the digital storage and processing.Image capture technology and the image processing technology to improve image quality has also begun the transition to the direction of digitization.Under the background of high speed and high resolution and large-capacity image, the conventional method has been unable to meet the software processing requirements. Field Programmable Gate Array (FPGA) is the programmable logic devices widely used today. FPGA-based hardware design, can give full play to the advantages of FPGA Field Programmable while using its rich hardware logic resources to ultimately achieve a high-performance image preprocessing system.The topic is to be achieved binocular image preprocessing system based on FPGA. The system provides a hardware platform not only for real-time measurements of the relative position between ships and offshore platforms, but also for achieving the goal of identifying and calculating three-dimensional position during vessel tracking process. Reliability and versatility and portability of the system will make the system has broad application prospects.The main work of this paper is as follows:1. Study the relevant theoretical knowledge of image preprocessing system. Expounds the working principle and design method of the sensor initialization module, data acquisition module, cache module, frame buffer control module, pretreatment module and the real-time display module.Each of these modules was realized on the Altera DE2-115development board using Verilog language,then the simulation test of the modules has carried on. Finally connect the various modules and implements the initialization of OV9655image sensor, as well as the image acquisition, caching, frame control and real-time display function. In the actual test image smooth and clear.2. In view of the mismatch problem in image data’s transmission, image frame buffer control module is designed. Through the method of frame data controlled while reading and writing process, the mismatch problem in the process of continuous, speaking, reading and writing when reading and writing rate does not match is solved.3. This paper expounds the build process of the SOPC system based on Nios II CPU core.The construction of the platform are verified. Image data transfer protocol is designed. Define the standard image data frame format and steps for data transmission between the Nios II and PC. The system provides a hardware platform to realize communication between Nios II CPU and the PC using TCP/IP. And the design of the image data transfer protocol do a good preparation for the subsequent software application development.4. Studied the Sobel edge detection algorithm. Refer to the traditional Sobel algorithm implementation method and Combining the FPGA design methods, the FPGA implementation scheme of Sobel edge detection algorithm is given...